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A 12b 600MS/s Pipelined SAR and 2x-Interleaved Incremental Delta-Sigma ADC with Source-Follower-Based Residue-Transfer Scheme in 7nm FinFET.

Seung-Yeob BaekIl-Hoon JangMichael ChoiHyungdong RohWoongtaek LimYoungjae ChoJongshin Shin
Published in: ISSCC (2021)
Keyphrases
  • analog to digital converter
  • delta sigma
  • noise shaping
  • color images
  • digital images
  • sar images
  • data flow