Sen-Wen Hsiao

Publication Activity (10 Years)

Years Active: 2006-2016
Publications (10 Years): 1

Top Topics

Parameter Values

Signal Reconstruction

Multiresolution

Top Venues

Asian Test Symposium

IEEE Trans. Circuits Syst. I Regul. Pap.

J. Electron. Test.

Publications

Nicholas Tzou, Debesh Bhatta, Xian Wang, Te-Hui Chen, Sen-Wen Hsiao, Barry J. Muldrey, Hyun Woo Choi, Abhijit Chatterjee
Concurrent Multi-Channel Crosstalk Jitter Characterization Using Coprime Period Channel Stimulus. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2016)
Debesh Bhatta, Nicholas Tzou, Joshua W. Wells, Sen-Wen Hsiao, Abhijit Chatterjee
Incoherent Undersampling-Based Waveform Reconstruction Using a Time-Domain Zero-Crossing Metric. IEEE Trans. Very Large Scale Integr. Syst. 23 (11) (2015)
Sen-Wen Hsiao, Chung-Chun Chen, Randy Caplan, Jeff Galloway, Blake Gray, Abhijit Chatterjee
Phase-locked loop design with SPO detection and charge pump trimming for reference spur suppression. VTS (2014)
Sen-Wen Hsiao, Xian Wang, Abhijit Chatterjee
Low Cost Built-in Sensor Testing of Phase-Locked Loop Dynamic Parameters. J. Electron. Test. 30 (5) (2014)
Debesh Bhatta, Nicholas Tzou, Sen-Wen Hsiao, Abhijit Chatterjee
Time Domain Reconstruction of Incoherently Undersampled Periodic Waveforms Using Bandwidth Interleaving. Asian Test Symposium (2013)
Sen-Wen Hsiao, Xian Wang, Abhijit Chatterjee
Analog Sensor Based Testing of Phase-Locked Loop Dynamic Performance Parameters. Asian Test Symposium (2013)
Nicholas Tzou, Debesh Bhatta, Sen-Wen Hsiao, Abhijit Chatterjee
Periodic jitter and bounded uncorrelated jitter decomposition using incoherent undersampling. DATE (2013)
Sen-Wen Hsiao, Nicholas Tzou, Abhijit Chatterjee
A programmable BIST design for PLL static phase offset estimation and clock duty cycle detection. VTS (2013)
Nicholas Tzou, Debesh Bhatta, Sen-Wen Hsiao, Hyun Woo Choi, Abhijit Chatterjee
Low-cost wideband periodic signal reconstruction using incoherent undersampling and back-end cost optimization. ITC (2012)
Sen-Wen Hsiao, Matthew Chung-Hin Leung
A Programmable 1-V CMOS 65 nm Frequency synthesizer Design in 60 GHz Wireless Transceiver. J. Circuits Syst. Comput. 21 (6) (2012)
Sen-Wen Hsiao, Yen-Chih Huang, David Liang, H.-W. K. Chen, Hsin-Shu Chen
A 1.5-V 10-ppm/°C 2nd-order curvature-compensated CMOS bandgap reference with trimming. ISCAS (2006)