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A Programmable 1-V CMOS 65 nm Frequency synthesizer Design in 60 GHz Wireless Transceiver.

Sen-Wen HsiaoMatthew Chung-Hin Leung
Published in: J. Circuits Syst. Comput. (2012)
Keyphrases
  • power consumption
  • clock gating
  • ultra low power
  • design process
  • single chip
  • user interface
  • high speed
  • circuit design
  • low cost
  • low power
  • frequency response
  • mobile devices
  • wireless transmission
  • phase locked loop