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Ramy N. Tadros
ORCID
Publication Activity (10 Years)
Years Active: 2014-2023
Publications (10 Years): 7
Top Topics
Nm Technology
Statistical Disclosure
Low Power
Top Venues
ISCAS
CoRR
IEEE Trans. Circuits Syst. II Express Briefs
ISLPED
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Publications
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John M. Abowd
,
Tamara Adams
,
Robert Ashmead
,
David Darais
,
Sourya Dey
,
Simson L. Garfinkel
,
Nathan Goldschlag
,
Daniel Kifer
,
Philip Leclerc
,
Ethan Lew
,
Scott Moore
,
Rolando A. Rodríguez
,
Ramy N. Tadros
,
Lars Vilhuber
The 2010 Census Confidentiality Protections Failed, Here's How and Why.
CoRR
(2023)
Ramy N. Tadros
,
Peter A. Beerel
A Theoretical Foundation for Timing Synchronous Systems Using Asynchronous Structures.
ACM Trans. Design Autom. Electr. Syst.
25 (2) (2020)
Ramy N. Tadros
,
Peter A. Beerel
A Robust and Self-Adaptive Clocking Technique for RSFQ Circuits - The Architecture.
ISCAS
(2018)
Weizhe Hua
,
Ramy N. Tadros
,
Peter A. Beerel
Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures.
ISLPED
(2016)
Ramy N. Tadros
,
Weizhe Hua
,
Matheus T. Moreira
,
Ney Laert Vilar Calazans
,
Peter A. Beerel
A Low-Power Low-Area Error-Detecting Latch for Resilient Architectures in 28-nm FDSOI.
IEEE Trans. Circuits Syst. II Express Briefs
(9) (2016)
Ajay Singhvi
,
Matheus T. Moreira
,
Ramy N. Tadros
,
Ney Laert Vilar Calazans
,
Peter A. Beerel
A Fine-Grain, Uniform, Energy-Efficient Delay Element for 2-Phase Bundled-Data Circuits.
ACM J. Emerg. Technol. Comput. Syst.
13 (2) (2016)
Ramy N. Tadros
,
Weizhe Hua
,
Matheus Gibiluka
,
Matheus T. Moreira
,
Ney Laert Vilar Calazans
,
Peter A. Beerel
Analysis and Design of Delay Lines for Dynamic Voltage Scaling Applications.
ASYNC
(2016)
Ajay Singhvi
,
Matheus T. Moreira
,
Ramy N. Tadros
,
Ney Laert Vilar Calazans
,
Peter A. Beerel
A Fine-Grained, Uniform, Energy-Efficient Delay Element for FD-SOI Technologies.
ISVLSI
(2015)
Ramy N. Tadros
,
Ahmed H. Abdelrahman
,
Maged Ghoneima
,
Yehea Ismail
A 24 Gbps SerDes transceiver for on-chip networks using a new half-data-rate self-timed 3-level signaling scheme.
ICEAC
(2015)
Ramy N. Tadros
,
Abdelrahman H. Elsayed
,
Maged Ghoneima
,
Yehea I. Ismail
A variation tolerant driving technique for all-digital self-timed 3-level signaling high-speed SerDes transceivers for on-chip networks.
ISCAS
(2014)
Abdelrahman H. Elsayed
,
Ramy N. Tadros
,
Maged Ghoneima
,
Yehea I. Ismail
Low-power all-digital manchester-encoding-based high-speed serdes transceiver for on-chip networks.
ISCAS
(2014)