Low Area, Low Power, Robust, Highly Sensitive Error Detecting Latch for Resilient Architectures.

Weizhe Hua Ramy N. Tadros Peter A. Beerel

Published in: ISLPED (2016)

Keyphrases

low power
power consumption
low cost
high speed
low power consumption
high power
single chip
wireless transmission
vlsi circuits
vlsi architecture
power reduction
logic circuits
delay insensitive
cmos technology
power dissipation
signal processor
gate array