Rafael Reif

Publication Activity (10 Years)

Years Active: 2000-2005
Publications (10 Years): 0

Publications

Nisha Checka, Anantha P. Chandrakasan, Rafael Reif
Substrate noise analysis and experimental verification for the efficient noise prediction of a digital PLL. CICC (2005)
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Timing, energy, and thermal performance of three-dimensional integrated circuits. ACM Great Lakes Symposium on VLSI (2004)
Shamik Das, Andy Fan, Kuan-Neng Chen, Chuan Seng Tan, Nisha Checka, Rafael Reif
Technology, performance, and computer-aided design of three-dimensional integrated circuits. ISPD (2004)
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Calibration of Rent's rule models for three-dimensional integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 12 (4) (2004)
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools. ISVLSI (2003)
Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Design tools for 3-D integrated circuits. ASP-DAC (2003)
Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Wiring requirement and three-dimensional integration technology for field programmable gate arrays. IEEE Trans. Very Large Scale Integr. Syst. 11 (1) (2003)
Rafael Reif, Andy Fan, Kuan-Neng Chen, Shamik Das
Fabrication Technologies for Three-Dimensional Integrated Circuits (invited). ISQED (2002)
Arifur Rahman, Shamik Das, Anantha P. Chandrakasan, Rafael Reif
Wiring requirement and three-dimensional integration of field-programmable gate arrays. SLIP (2001)
Jeffery A. Davis, Raguraman Venkatesan, Alan Kaloyeros, Michael Beylansky, Shukri J. Souri, Kaustav Banerjee, Krishna C. Saraswat, Arifur Rahman, Rafael Reif, James D. Meindl
Interconnect limits on gigascale integration (GSI) in the 21st century. Proc. IEEE 89 (3) (2001)
Arifur Rahman, Rafael Reif
System-level performance evaluation of three-dimensional integrated circuits. IEEE Trans. Very Large Scale Integr. Syst. 8 (6) (2000)