Priyank Kalla

Publication Activity (10 Years)

Years Active: 1997-2023
Publications (10 Years): 17

Top Topics

Algebraic Geometry

Surface Roughness

Formal Verification

Camera Calibration

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Bhavani Sampathkumar, Bailey Martin, Ritaja Das, Priyank Kalla, Florian Enescu
Logic Synthesis from Polynomials with Coefficients in the Field of Rationals. ISMVL (2023)
Pratishtha Agnihotri, Lawrence M. Schlitt, Priyank Kalla, Steve Blair
Abstractions for Modeling the Effects of Wall Surface Roughness in Silicon Photonic Microring Resonators. LATS (2023)
Vikas Rao, Haden Ondricek, Priyank Kalla, Florian Enescu
Rectification of Integer Arithmetic Circuits using Computer Algebra Techniques. ICCD (2021)
Vikas Rao, Irina Ilioaea, Haden Ondricek, Priyank Kalla, Florian Enescu
Word-Level Multi-Fix Rectifiability of Finite Field Arithmetic Circuits. ISQED (2021)
Vikas Rao, Haden Ondricek, Priyank Kalla, Florian Enescu
Algebraic Techniques for Rectification of Finite Field Circuits. VLSI-SoC (2021)
Utkarsh Gupta, Priyank Kalla, Vikas Rao
Boolean Gröbner Basis Reductions on Finite Field Datapath Circuits Using the Unate Cube Set Algebra. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 38 (3) (2019)
Utkarsh Gupta, Priyank Kalla, Irina Ilioaea, Florian Enescu
Exploring Algebraic Interpolants for Rectification of Finite Field Arithmetic Circuits with Gröbner Bases. ETS (2019)
Utkarsh Gupta, Irina Ilioaea, Vikas Rao, Arpitha Srinath, Priyank Kalla, Florian Enescu
On the Rectifiability of Arithmetic Circuits using Craig Interpolants in Finite Fields. VLSI-SoC (2018)
Utkarsh Gupta, Irina Ilioaea, Vikas Rao, Arpitha Srinath, Priyank Kalla, Florian Enescu
Rectification of Arithmetic Circuits with Craig Interpolants in Finite Fields. VLSI-SoC (Selected Papers) (2018)
Vikas Rao, Utkarsh Gupta, Irina Ilioaea, Arpitha Srinath, Priyank Kalla, Florian Enescu
Post-Verification Debugging and Rectification of Finite Field Arithmetic Circuits using Computer Algebra Techniques. FMCAD (2018)
Tim Pruss, Priyank Kalla, Florian Enescu
Efficient Symbolic Computation for Word-Level Abstraction From Combinational Circuits for Verification Over Finite Fields. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (7) (2016)
Xiaojun Sun, Priyank Kalla, Florian Enescu
Word-level traversal of finite state machines using algebraic geometry. HLDVT (2016)
Xiaojun Sun, Irina Ilioaea, Priyank Kalla, Florian Enescu
Finding Unsatisfiable Cores of a Set of Polynomials Using the Gröbner Basis Algorithm. CP (2016)
Lawrence M. Schlitt, Priyank Kalla, Steve Blair
A Methodology for Thermal Characterization Abstraction of Integrated Opto-Electronic Layouts. VLSI Design (2016)
Priyank Kalla
Formal Verification of Arithmetic Datapaths using Algebraic Geometry and Symbolic Computation. FMCAD (2015)
Xiaojun Sun, Priyank Kalla, Tim Pruss, Florian Enescu
Formal verification of sequential Galois field arithmetic circuits using algebraic geometry. DATE (2015)
Miodrag Potkonjak, Deming Chen, Priyank Kalla, Steven P. Levitan
DA Vision 2015: From Here to Eternity. ICCAD (2015)
Tim Pruss, Priyank Kalla, Florian Enescu
Equivalence Verification of Large Galois Field Arithmetic Circuits using Word-Level Abstraction via Gröbner Bases. DAC (2014)
Christopher Condrat, Priyank Kalla, Steve Blair
Crossing-Aware Channel Routing for Integrated Optics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (6) (2014)
Christopher Condrat, Priyank Kalla, Steve Blair
Thermal-aware synthesis of integrated photonic ring resonators. ICCAD (2014)
Christopher Condrat, Priyank Kalla, Steve Blair
Crossing-aware channel routing for photonic waveguides. MWSCAS (2013)
Christopher Condrat, Priyank Kalla, Steve Blair
Channel routing for integrated optics. SLIP (2013)
Jinpeng Lv, Priyank Kalla, Florian Enescu
Efficient Gröbner Basis Reductions for Formal Verification of Galois Field Arithmetic Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 32 (9) (2013)
Christopher Condrat, Priyank Kalla, Steve Blair
A methodology for physical design automation for integrated optics. MWSCAS (2012)
Jinpeng Lv, Priyank Kalla
Formal Verification of Galois Field Multipliers Using Computer Algebra Techniques. VLSI Design (2012)
Jinpeng Lv, Priyank Kalla, Florian Enescu
Efficient Gröbner basis reductions for formal verification of galois field multipliers. DATE (2012)
Jinpeng Lv, Priyank Kalla, Florian Enescu
) using computer algebra techniques. HLDVT (2011)
Christopher Condrat, Priyank Kalla, Steve Blair
Logic synthesis for integrated optics. ACM Great Lakes Symposium on VLSI (2011)
Sivaram Gopalakrishnan, Priyank Kalla
Algebraic techniques to enhance common sub-expression elimination for polynomial system synthesis. DATE (2009)
Priyank Kalla, Prabhat Mishra
Chairs' welcome message. HLDVT (2009)
Sivaram Gopalakrishnan, Priyank Kalla
2009 ACM TODAES best paper award: Optimization of polynomial datapaths using finite ring algebra. ACM Trans. Design Autom. Electr. Syst. 14 (4) (2009)
Namrata Shekhar, Priyank Kalla, M. Brandon Meredith, Florian Enescu
Simulation Bounds for Equivalence Verification of Polynomial Datapaths Using Finite Ring Algebra. IEEE Trans. Very Large Scale Integr. Syst. 16 (4) (2008)
Neal Tew, Priyank Kalla, Namrata Shekhar, Sivaram Gopalakrishnan
Verification of arithmetic datapaths using polynomial function models and congruence solving. ICCAD (2008)
Sivaram Gopalakrishnan, Priyank Kalla, M. Brandon Meredith, Florian Enescu
Finding linear building-blocks for RTL synthesis of polynomial datapaths with fixed-size bit-vectors. ICCAD (2007)
Sivaram Gopalakrishnan, Priyank Kalla, Florian Enescu
Optimization of Arithmetic Datapaths with Finite Word-Length Operands. ASP-DAC (2007)
Christopher Condrat, Priyank Kalla
A Gröbner Basis Approach to CNF-Formulae Preprocessing. TACAS (2007)
Sivaram Gopalakrishnan, Priyank Kalla
Optimization of polynomial datapaths using finite ring algebra. ACM Trans. Design Autom. Electr. Syst. 12 (4) (2007)
Vijay Durairaj, Priyank Kalla
Guiding CNF-SAT Search by Analyzing Constraint-Variable Dependencies and Clause Lengths. HLDVT (2006)
Namrata Shekhar, Priyank Kalla, Florian Enescu
Equivalence verification of arithmetic datapaths with multiple word-length operands. DATE (2006)
Namrata Shekhar, Priyank Kalla, M. Brandon Meredith, Florian Enescu
Simulation Bounds for Equivalence Verification of Arithmetic Datapaths with Finite Word-Length Operands. FMCAD (2006)
Maciej J. Ciesielski, Priyank Kalla, Serkan Askar
Taylor Expansion Diagrams: A Canonical Representation for Verification of Data Flow Designs. IEEE Trans. Computers 55 (9) (2006)
Namrata Shekhar, Priyank Kalla, Florian Enescu, Sivaram Gopalakrishnan
Equivalence verification of polynomial datapaths with fixed-size bit-vectors using finite ring algebra. ICCAD (2005)
Vijay Durairaj, Priyank Kalla
Variable Ordering for Efficient SAT Search by Analyzing Constraint-Variable Dependencies. SAT (2005)
Namrata Shekhar, Priyank Kalla, Sivaram Gopalakrishnan, Florian Enescu
Exploiting Vanishing Polynomials for Equivalence Veri.cation of Fixed-Size Arithmetic Datapaths. ICCD (2005)
Vijay Durairaj, Priyank Kalla
Exploiting hypergraph partitioning for efficient Boolean satisfiability. HLDVT (2004)
Vijay Durairaj, Priyank Kalla
Dynamic analysis of constraint-variable dependencies to guide SAT diagnosis. HLDVT (2004)
Vijay Durairaj, Priyank Kalla
Guiding CNF-SAT search via efficient constraint partitioning. ICCAD (2004)
Sivaram Gopalakrishnan, Vijay Durairaj, Priyank Kalla
Integrating CNF and BDD based SAT solvers. HLDVT (2003)
Priyank Kalla, Maciej J. Ciesielski
A comprehensive approach to the partial scan problem using implicitstate enumeration. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (7) (2002)
Maciej J. Ciesielski, Priyank Kalla, Zhihong Zeng, Bruno Rouzeyre
Taylor Expansion Diagrams: A Compact, Canonical Representation with Applications to Symbolic Verification. DATE (2002)
Priyank Kalla, Maciej J. Ciesielski, Emmanuel Boutillon, Eric Martin
High-level design verification using Taylor Expansion Diagrams: first results. HLDVT (2002)
Navin Vemuri, Priyank Kalla, Russell Tessier
BDD-based logic synthesis for LUT-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 7 (4) (2002)
Zhihong Zeng, Priyank Kalla, Maciej J. Ciesielski
LPSAT: a unified approach to RTL satisfiability. DATE (2001)
Maciej J. Ciesielski, Priyank Kalla, Zhihong Zeng, Bruno Rouzeyre
Taylor expansion diagrams: a new representation for RTL verification. HLDVT (2001)
Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski
Strategies for solving the Boolean satisfiability problem using binary decision diagrams. J. Syst. Archit. 47 (6) (2001)
Priyank Kalla, Zhihong Zeng, Maciej J. Ciesielski, ChiLai Huang
A BDD-Based Satisfiability Infrastructure Using the Unate Recursive Paradigm. DATE (2000)
Priyank Kalla, Maciej J. Ciesielski
Performance Driven Resynthesis by Exploiting Retiming-Induced State Register Equivalence. DATE (1999)
Priyank Kalla, Maciej J. Ciesielski
A comprehensive approach to the partial scan problem using implicit state enumeration. ITC (1998)
Priyank Kalla, Maciej J. Ciesielski
Testability of Sequential Circuits with Multi-Cycle False Path. VTS (1997)