Philippe Vialletelle

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 13

Top Topics

Constrained Minimization

Semiconductor Manufacturing

Probability Estimation

Top Venues

Int. J. Prod. Res.

Publications

Melek Rodoplu, Stéphane Dauzère-Pérès, Philippe Vialletelle
Integrated planning of maintenance operations and workload allocation. Int. J. Prod. Res. 61 (23) (2023)
Antoine Perraudat, Stéphane Dauzère-Pérès, Philippe Vialletelle
Optimizing multiple qualifications of products on non-identical parallel machines. Comput. Oper. Res. 144 (2022)
Alexandre Lima, Valeria Borodin, Stéphane Dauzère-Pérès, Philippe Vialletelle
A sampling-based approach for managing lot release in time constraint tunnels in semiconductor manufacturing. Int. J. Prod. Res. 59 (3) (2021)
Claire Paya, Euriell Le Corronc, Yannick Pencolé, Philippe Vialletelle
Observer-based detection and localization of time shift failures in (max, +)-linear systems. CASE (2021)
Claire Paya, Euriell Le Corronc, Yannick Pencolé, Philippe Vialletelle
Model-Based Diagnosis of Time Shift Failures in Discrete Event Systems: A (Max, +) Observer-Based Approach. KES-IDT (2021)
Peter Lendermann, Stéphane Dauzère-Pérès, Leon F. McGinnis, Lars Mönch, Tina O'Donnell, Georg Seidel, Philippe Vialletelle
Scheduling and Simulation in wafer fabs: Competitors, Independent Players or Amplifiers? WSC (2020)
Alexandre Moritz, Stéphane Dauzère-Pérès, Oussama Ben Ammar, Philippe Vialletelle
Maintenance with Production Planning Constraints in Semiconductor Manufacturing. WSC (2020)
Alexandre Lima, Valeria Borodin, Stéphane Dauzère-Pérès, Philippe Vialletelle
Sampling-based release control of multiple lots in time constraint tunnels. Comput. Ind. 110 (2019)
Antoine Perraudat, Stéphane Dauzère-Pérès, Philippe Vialletelle
Evaluating the Impact of Dynamic Qualification Management in Semiconductor Manufacturing. WSC (2019)
Georg Laipple, Stéphane Dauzère-Pérès, Thomas Ponsignon, Philippe Vialletelle
Generic Data Model for semiconductor manufacturing supply Chains. WSC (2018)
Alexandre Lima, Valeria Borodin, Stéphane Dauzère-Pérès, Philippe Vialletelle
Analyzing different dispatching policies for probability estimation in time constraint tunnels in semiconductor manufacturing. WSC (2017)
Kean Dequeant, Philippe Vialletelle, Pierre Lemaire, Marie-Laure Espinouse
A literature review on variability in semiconductor manufacturing: The next forward leap to Industry 4.0. WSC (2016)
Amelie Pianne, Luis Rivero, Stéphane Dauzère-Pérès, Philippe Vialletelle
Ideal and potential flexibility measures for qualification management in semiconductor manufacturing. WSC (2016)
Claude Yugma, Jakey Blue, Stéphane Dauzère-Pérès, Philippe Vialletelle
Integration of scheduling and advanced process control in semiconductor manufacturing: review and outlook. CASE (2014)
Emna Mhiri, Mireille Jacomino, Fabien Mangione, Philippe Vialletelle, Guillaume Lepelletier
A step toward capacity planning at finite capacity in semiconductor manufacturing. WSC (2014)
Ahmed Ben Amira, Guillaume Lepelletier, Philippe Vialletelle, Stéphane Dauzère-Pérès, Claude Yugma, Philippe Lalevée
Modeling complex processability constraints in high-mix semiconductor manufacturing. WSC (2013)
Justin Nduhura Munga, Stéphane Dauzère-Pérès, Philippe Vialletelle, Claude Yugma
Industrial implementation of a dynamic sampling algorithm in semiconductor manufacturing: approach and challenges. WSC (2012)
Claude Yugma, Stéphane Dauzère-Pérès, Jean-Loup Rouveyrol, Philippe Vialletelle, Jacques Pinaton, Christophe Relliaud
A smart sampling scheduling and skipping simulator and its evaluation on real data sets. WSC (2011)
Justin Nduhura Munga, Philippe Vialletelle, Stéphane Dauzère-Pérès, Claude Yugma
Optimized management of excursions in semiconductor manufacturing. WSC (2011)
Carl Johnzen, Philippe Vialletelle, Stéphane Dauzère-Pérès, Claude Yugma, Alexandre Derreumaux
Impact of qualification management on scheduling in semiconductor manufacturing. WSC (2008)
Dominique Mercier, Olivier Bonnin, Philippe Vialletelle
Achieving Optimal Cycle Time Improvement in a 300-mm Semiconductor Fab Using Dynamic Simulation and Design of Experiments. Simul. 79 (3) (2003)