Peter-Michael Seidel

Publication Activity (10 Years)

Years Active: 1998-2019
Publications (10 Years): 8

Top Venues

MTV

CoRR

ACSSC

LICS

Saarland University, Saarbrücken, Germany (PHD)

Education History

Saarland University, Saarbrücken, Germany

PHD

Publications

Jason Castiglione, Dusko Pavlovic, Peter-Michael Seidel
Privacy protocols. CoRR (2019)
Jason Castiglione, Dusko Pavlovic, Peter-Michael Seidel
Privacy Protocols. Foundations of Security, Protocols, and Equational Reasoning (2019)
Peter-Michael Seidel
- 3. ACSSC (2018)
Peter-Michael Seidel
Variable Latency Division. MWSCAS (2018)
Mark Nelson, Peter-Michael Seidel
Modeling and Analysis of Secure Processor Extensions Based on Actor Networks. MTV (2017)
Dusko Pavlovic, Peter-Michael Seidel
Quotients in monadic programming: Projective algebras are equivalent to coalgebras. LICS (2017)
Dusko Pavlovic, Peter-Michael Seidel
Quotients in monadic programming: Projective algebras are equivalent to coalgebras. CoRR (2017)
Dusko Pavlovic, Peter-Michael Seidel
(Modular) Effect Algebras are Equivalent to (Frobenius) Antispecial Algebras. QPL (2016)
Mark Nelson, Peter-Michael Seidel
Modeling and Analysis of Trusted Boot Processes Based on Actor Network Procedures. MTV (2015)
Peter-Michael Seidel
A parametric error analysis of Goldschmidt's square-root algorithm. ACSSC (2015)
Peter-Michael Seidel
Directed Test Case Generation for x86 Instruction Decoding. MTV (2014)
Alberto Nannarelli, Peter-Michael Seidel, Ping Tak Peter Tang
Guest Editors' Introduction: Special Section on Computer Arithmetic. IEEE Trans. Computers 63 (8) (2014)
Peter-Michael Seidel
A Case for Multi-level Combination of Theorem Proving and Model Checking Tools. MTV (2014)
Jeff Rupley, John King, Eric Quinnell, Frank Galloway, Ken Patton, Peter-Michael Seidel, James Dinh, Hai Bui, Anasua Bhowmik
The Floating-Point Unit of the Jaguar x86 Core. IEEE Symposium on Computer Arithmetic (2013)
Peter-Michael Seidel
Formal Verification of an Iterative Low-Power x86 Floating-Point Multiplier with Redundant Feedback ACL2 (2011)
Peter-Michael Seidel, Georgi Gaydadjiev, Sofiène Tahar, Lars J. Svensson
Welcome to ICCD 2010! ICCD (2010)
Nikhil Kikkeri, Peter-Michael Seidel
An FPGA Implementation of a Fully Verified Double Precision IEEE Floating-Point Adder. ASAP (2007)
Ronen Goldberg, Guy Even, Peter-Michael Seidel
An FPGA implementation of pipelined multiplicative division with IEEE Rounding. FCCM (2007)
Nikhil Kikkeri, Peter-Michael Seidel
Optimized Arithmetic Hardware Design based on Hierarchical Formal Verification. ICECS (2006)
Peter-Michael Seidel, Lee D. McFearin, David W. Matula
Secondary Radix Recodings for Higher Radix Multipliers. IEEE Trans. Computers 54 (2) (2005)
Nikhil Kikkeri, Peter-Michael Seidel
Formal Verification of Parametric Multiplicative Division Implementations. ICCD (2005)
Peter-Michael Seidel
High-Radix Implementation of IEEE Floating-Point Addition. IEEE Symposium on Computer Arithmetic (2005)
Guy Even, Peter-Michael Seidel, Warren E. Ferguson
A parametric error analysis of Goldschmidt's division algorithm. J. Comput. Syst. Sci. 70 (1) (2005)
Nathaniel Ayewah, Nikhil Kikkeri, Peter-Michael Seidel
Challenges in the Formal Verification of Complete State-of-the-Art Processors. ICCD (2005)
Peter-Michael Seidel, Guy Even
Delay-Optimized Implementation of IEEE Floating-Point Addition. IEEE Trans. Computers 53 (2) (2004)
Peter-Michael Seidel, Kenneth Fazel
Two-Dimensional Folding Strategies for Improved Layouts of Cyclic Shifters. ISVLSI (2004)
Nikhil Kikkeri, Peter-Michael Seidel
Formal Hardware Verification based on Signal Correlation Properties. ICCD (2004)
Steven D. Krueger, Peter-Michael Seidel
Design of an On-Line IEEE Floating-Point Addition Unit for FPGAs. FCCM (2004)
Guy Even, Peter-Michael Seidel, Warren E. Ferguson
A Parametric Error Analysis of Goldschmidt?s Division Algorithm. IEEE Symposium on Computer Arithmetic (2003)
Guy Even, Peter-Michael Seidel
Pipelined Multiplicative Division with IEEE Rounding. ICCD (2003)
Wolfgang J. Paul, Peter-Michael Seidel
To Booth or not to Booth. Integr. 32 (1-2) (2002)
Mark A. Hillebrand, Thomas Schurger, Peter-Michael Seidel
How to Half Wire Lengths in the Layout of Cyclic Shifter. VLSI Design (2001)
Peter-Michael Seidel, Guy Even
On the Design of Fast IEEE Floating-Point Adders. IEEE Symposium on Computer Arithmetic (2001)
Peter-Michael Seidel, Lee D. McFearin, David W. Matula
Binary Multiplication Radix-32 and Radix-256. IEEE Symposium on Computer Arithmetic (2001)
Guy Even, Silvia M. Müller, Peter-Michael Seidel
A dual precision IEEE floating-point multiplier. Integr. 29 (2) (2000)
Guy Even, Peter-Michael Seidel
A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication. IEEE Trans. Computers 49 (7) (2000)
Peter-Michael Seidel
High-speed redundant reciprocal approximation. Integr. 28 (1) (1999)
Guy Even, Peter-Michael Seidel
A Comparison of Three Rounding Algorithms for IEEE Floating-Point Multiplication. IEEE Symposium on Computer Arithmetic (1999)
Peter-Michael Seidel
How to Half the Latency of IEEE Compliant Floating-Point Multiplication. EUROMICRO (1998)
Peter-Michael Seidel, Guy Even
How many logic levels does floating-point addition require? ICCD (1998)

Peter-Michael Seidel

Publication Activity (10 Years)

Top Topics

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