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Peter Krotnev
ORCID
Publication Activity (10 Years)
Years Active: 2020-2022
Publications (10 Years): 6
Top Topics
High Power
Vlsi Architecture
Error Propagation
Low Power Consumption
Top Venues
ISSCC
IEEE Trans. Circuits Syst. I Regul. Pap.
ESSCIRC
ISCAS
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Publications
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James Bailey
,
Hossein Shakiba
,
Ehud Nir
,
Grigory Marderfeld
,
Peter Krotnev
,
Marc-Andre LaCroix
,
David Cassan
,
Davide Tonietto
A 112-Gb/s PAM-4 Low-Power Nine-Tap Sliding-Block DFE in a 7-nm FinFET Wireline Receiver.
IEEE J. Solid State Circuits
57 (1) (2022)
Euhan Chong
,
Faisal Ahmed Musa
,
Ahmed N. Mustafa
,
Tim Gao
,
Peter Krotnev
,
Rashid Soreefan
,
Qian Xin
,
Paul Madeira
,
Davide Tonietto
A 112Gb/s PAM-4, 168Gb/s PAM-8 7bit DAC-Based Transmitter in 7nm FinFET.
ESSCIRC
(2021)
Ming Yang
,
Shayan Shahramian
,
Henry Wong
,
Peter Krotnev
,
Anthony Chan Carusone
Pre-FEC and Post-FEC BER as Criteria for Optimizing Wireline Transceivers.
ISCAS
(2021)
James Bailey
,
Hossein Shakiba
,
Ehud Nir
,
Grigory Marderfeld
,
Peter Krotnev
,
Marc-Andre LaCroix
,
David Cassan
A 112Gb/s PAM-4 Low-Power 9-Tap Sliding-Block DFE in a 7nm FinFET Wireline Receiver.
ISSCC
(2021)
Marc-Andre LaCroix
,
Euhan Chong
,
Weilun Shen
,
Ehud Nir
,
Faisal Ahmed Musa
,
Haitao Mei
,
Mohammad-Mahdi Mohsenpour
,
Semyon Lebedev
,
Babak Zamanlooy
,
Carlos Carvalho
,
Qian Xin
,
Dmitry Petrov
,
Henry Wong
,
Huong Ho
,
Yang Xu
,
Sina Naderi Shahi
,
Peter Krotnev
,
Chris Feist
,
Howard Huang
,
Davide Tonietto
8.4 A 116Gb/s DSP-Based Wireline Transceiver in 7nm CMOS Achieving 6pJ/b at 45dB Loss in PAM-4/Duo-PAM-4 and 52dB in PAM-2.
ISSCC
(2021)
Ming Yang
,
Shayan Shahramian
,
Hossein Shakiba
,
Henry Wong
,
Peter Krotnev
,
Anthony Chan Carusone
Statistical BER Analysis of Wireline Links With Non-Binary Linear Block Codes Subject to DFE Error Propagation.
IEEE Trans. Circuits Syst. I Regul. Pap.
(1) (2020)