Nazanin Mansouri

Publication Activity (10 Years)

Years Active: 1998-2009
Publications (10 Years): 0

Publications

Deniz Dal, Nazanin Mansouri
Power Optimization With Power Islands Synthesis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (7) (2009)
Youngsik Kim, Nazanin Mansouri
Automated formal verification of scheduling with speculative code motions. ACM Great Lakes Symposium on VLSI (2008)
Deniz Dal, Nazanin Mansouri
Determining the Optimal Number of Islands in Power Islands Synthesis. ISVLSI (2008)
Deniz Dal, Nazanin Mansouri
A high-level register optimization technique for minimizing leakage and dynamic power. ACM Great Lakes Symposium on VLSI (2007)
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
Reliability-Centric High-Level Synthesis CoRR (2007)
Shweta Shah, Nazanin Mansouri, Adrián Núñez-Aldana
Pre-Layout Estimation of Interconnect Lengths for Digital Integrated Circuits. CONIELECOMP (2006)
Deniz Dal, Adrian Nunez, Nazanin Mansouri
Power Islands: A High-Level Technique for Counteracting Leakage in Deep Sub-Micron. ISQED (2006)
Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Ozcan Ozturk
An ILP Formulation for Task Scheduling on Heterogeneous Chip Multiprocessors. ISCIS (2006)
Suleyman Tosun, Ozcan Ozturk, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
An ILP Formulation for Reliability-Oriented High-Level Synthesis. ISQED (2005)
Suleyman Tosun, Nazanin Mansouri, Mahmut T. Kandemir, Özcan Özturk
Constraint-based Code mapping for heterogeneous Chip multiprocessors. SoCC (2005)
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie
Reliability-Centric High-Level Synthesis. DATE (2005)
Suleyman Tosun, Nazanin Mansouri, Ercument Arvas, Mahmut T. Kandemir, Yuan Xie, Wei-Lun Hung
Reliability-Centric Hardware/Software Co-Design. ISQED (2005)
Youngsik Kim, Parija Sule, Nazanin Mansouri
Exploiting PSL standard assertions in a theorem-proving-based verification environment. ACM Great Lakes Symposium on VLSI (2005)
Youngsik Kim, Shekhar Kopuri, Nazanin Mansouri
Automated Formal Verification of Scheduling Process Using Finite State Machines with Datapath (FSMD). ISQED (2004)
Shekhar Kopuri, Nazanin Mansouri
Enhancing scheduling solutions through ant colony optimization. ISCAS (5) (2004)
Anli He, Parija Sule, Youngsik Kim, Nazanin Mansouri
Exploiting OVL standard assertions in a theorem-proving-based verification environment. Circuits, Signals, and Systems (2004)
Suleyman Tosun, Hakduran Koc, Nazanin Mansouri
Derving Intermediary RTLs for Verification of Pipelined Synthesized Designs. VLSI (2003)
Nazanin Mansouri, Ranga Vemuri
Automated Correctness Condition Generation for Formal Verification of Synthesized RTL Designs. Formal Methods Syst. Des. 16 (1) (2000)
Nazanin Mansouri, Ranga Vemuri
Accounting for Various Register Allocation Schemes During Post-Synthesis Verification of RTL Designs. DATE (1999)
Viresh Paruthi, Nazanin Mansouri, Ranga Vemuri
Automatic data path abstraction for verification of large scale designs. ICCD (1998)
Nazanin Mansouri, Ranga Vemuri
A Methodology for Automated Verification of Synthesized RTL Designs and Its Integration with a High-Level Synthesis Tool. FMCAD (1998)