Pre-Layout Estimation of Interconnect Lengths for Digital Integrated Circuits.

Shweta Shah Nazanin Mansouri Adrián Núñez-Aldana

Published in: CONIELECOMP (2006)

Keyphrases

integrated circuit
electron beam
digital libraries
high speed
metal oxide semiconductor
estimation algorithm
digital technologies
printed circuit boards
hardware description language
neural network
robust estimation
estimation process
spatial layout
document image analysis