Mohammad H. Tehranipour

Publication Activity (10 Years)

Years Active: 2001-2005
Publications (10 Years): 0

Publications

Mehrdad Nourani, Mohammad H. Tehranipour
RL-huffman encoding for test compression and power reduction in scan applications. ACM Trans. Design Autom. Electr. Syst. 10 (1) (2005)
Mohammad H. Tehranipour, Mehrdad Nourani, Krishnendu Chakrabarty
Nine-Coded Compression Technique with Application to Reduced Pin-Count Testing and Flexible On-Chip Decompression. DATE (2004)
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
Testing SoC interconnects for signal integrity using extended JTAG architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 23 (5) (2004)
Nisar Ahmed, Mohammad H. Tehranipour, Dian Zhou, Mehrdad Nourani
Frequency driven repeater insertion for deep submicron. ISCAS (5) (2004)
Mohammad H. Tehranipour, Seid Mehdi Fakhraie, Zainalabedin Navabi, M. R. Movahedin
A Low-Cost At-Speed BIST Architecture for Embedded Processor and SRAM Cores. J. Electron. Test. 20 (2) (2004)
Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
Low power pattern generation for BIST architecture. ISCAS (2) (2004)
Mohammad H. Tehranipour, Mehrdad Nourani, Karim Arabi, Ali Afzali-Kusha
Mixed RL-Huffman encoding for power reduction and data compression in scan test. ISCAS (2) (2004)
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity. ICCD (2003)
Mohammad H. Tehranipour, Mehrdad Nourani, Seid Mehdi Fakhraie, Ali Afzali-Kusha
Systematic test program generation for SoC testing using embedded processor. ISCAS (5) (2003)
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nourani
Testing SoC Interconnects for Signal Integrity Using Boundary Scan. VTS (2003)
G. R. Chaji, R. M. Pourrad, Seid Mehdi Fakhraie, Mohammad H. Tehranipour
eUTDSP: a design study of a new VLIW-based DSP architecture. ISCAS (4) (2003)
Nisar Ahmed, Mohammad H. Tehranipour, Mehrdad Nourani
Extending JTAG for Testing Signal Integrity in SoCs. DATE (2003)
Mohammad H. Tehranipour, Mehrdad Nourani
Signal Integrity Loss in SoC's Interconnects: A Diagnosis Approach Using Embedded Microprocessor. ITC (2002)
Mohammad H. Tehranipour, Zainalabedin Navabi, Seid Mehdi Fakhraie
An efficient BIST method for testing of embedded SRAMs. ISCAS (5) (2001)