Low power pattern generation for BIST architecture.
Nisar AhmedMohammad H. TehranipourMehrdad NouraniPublished in: ISCAS (2) (2004)
Keyphrases
- low power
- pattern generation
- vlsi architecture
- power consumption
- high speed
- low cost
- cmos technology
- single chip
- mixed signal
- high power
- nm technology
- wireless transmission
- low power consumption
- digital signal processing
- vlsi circuits
- signal processor
- cellular automaton
- vlsi implementation
- real time
- gate array
- wireless networks
- delay insensitive