Testing SoC interconnects for signal integrity using extended JTAG architecture.
Mohammad H. TehranipourNisar AhmedMehrdad NouraniPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (2004)
Keyphrases
- signal processing
- original signal
- integrity constraints
- management system
- hardware software co design
- frequency domain
- non stationary
- wavelet analysis
- software architecture
- test data
- architectural design
- software testing
- test suite
- data flow
- hardware implementation
- database
- input output
- high frequency
- test set
- peer to peer
- database systems
- real time