Matteo Perotti

Publication Activity (10 Years)

Years Active: 2021-2024
Publications (10 Years): 23

Top Topics

Highly Efficient

Matrix Multiplication

Top Venues

Publications

Matteo Perotti, Michele Raeber, Mattia Sinigaglia, Matheus A. Cavalcante, Davide Rossi, Luca Benini
Spatzformer: An Efficient Reconfigurable Dual-Core RISC-V V Cluster for Mixed Scalar-Vector Workloads. CoRR (2024)
Matteo Perotti, Matheus A. Cavalcante, Renzo Andri, Lukas Cavigelli, Luca Benini
Ara2: Exploring Single- and Multi-Core Vector Processing With an Efficient RVV 1.0 Compliant Open-Source Processor. IEEE Trans. Computers 73 (7) (2024)
Matteo Perotti, Yichao Zhang, Matheus A. Cavalcante, Enis Mustafa, Luca Benini
MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication. CoRR (2024)
Michael Rogenmoser, Alessandro Ottaviano, Thomas Benz, Robert Balas, Matteo Perotti, Angelo Garofalo, Luca Benini
SentryCore: A RISC-V Co-Processor System for Safe, Real-Time Control Applications. CoRR (2024)
Matteo Perotti, Yichao Zhang, Matheus A. Cavalcante, Enis Mustafa, Luca Benini
MX: Enhancing RISC-V's Vector ISA for Ultra-Low Overhead, Energy-Efficient Matrix Multiplication. DATE (2024)
Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini
Near-Memory Parallel Indexing and Coalescing: Enabling Highly Efficient Indirect Access for SpMV. DATE (2024)
Angelo Garofalo, Yvan Tortorella, Matteo Perotti, Luca Valente, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti
DARKSIDE: A Heterogeneous RISC-V Compute Cluster for Extreme-Edge On-Chip DNN Inference and Training. CoRR (2023)
Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini
AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads. DATE (2023)
MohammadHossein AskariHemmat, Theo Dupuis, Yoan Fournier, Nizar El Zarif, Matheus A. Cavalcante, Matteo Perotti, Frank K. Gürkaynak, Luca Benini, François Leduc-Primeau, Yvon Savaria, Jean-Pierre David
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference. CoRR (2023)
Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini
Near-Memory Parallel Indexing and Coalescing: Enabling Highly Efficient Indirect Access for SpMV. CoRR (2023)
MohammadHossein AskariHemmat, Théo Dupuis, Yoan Fournier, Nizar El Zarif, Matheus A. Cavalcante, Matteo Perotti, Frank K. Gürkaynak, Luca Benini, François Leduc-Primeau, Yvon Savaria, Jean-Pierre David
Quark: An Integer RISC-V Vector Processor for Sub-Byte Quantized DNN Inference. ISCAS (2023)
Matteo Perotti, Matheus A. Cavalcante, Alessandro Ottaviano, Jiantao Liu, Luca Benini
Yun: An Open-Source, 64-Bit RISC-V-Based Vector Processor With Multi-Precision Integer and Floating-Point Support in 65-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 70 (10) (2023)
Jannis Schönleber, Lukas Cavigelli, Renzo Andri, Matteo Perotti, Luca Benini
Stella Nera: Achieving 161 TOp/s/W with Multiplier-free DNN Acceleration based on Approximate Matrix Multiplication. CoRR (2023)
Matheus A. Cavalcante, Matteo Perotti, Samuel Riedel, Luca Benini
Spatz: Clustering Compact RISC-V-Based Vector Units to Maximize Computing Efficiency. CoRR (2023)
Matteo Perotti, Matheus A. Cavalcante, Renzo Andri, Lukas Cavigelli, Luca Benini
Ara2: Exploring Single- and Multi-Core Vector Processing with an Efficient RVV1.0 Compliant Open-Source Processor. CoRR (2023)
Matteo Perotti, Matheus A. Cavalcante, Nils Wistoff, Renzo Andri, Lukas Cavigelli, Luca Benini
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design. ASAP (2022)
Matheus A. Cavalcante, Domenic Wüthrich, Matteo Perotti, Samuel Riedel, Luca Benini
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters. ICCAD (2022)
Matheus A. Cavalcante, Domenic Wüthrich, Matteo Perotti, Samuel Riedel, Luca Benini
Spatz: A Compact Vector Processing Unit for High-Performance and Energy-Efficient Shared-L1 Clusters. CoRR (2022)
Chi Zhang, Paul Scheffler, Thomas Benz, Matteo Perotti, Luca Benini
AXI-Pack: Near-Memory Bus Packing for Bandwidth-Efficient Irregular Workloads. CoRR (2022)
Angelo Garofalo, Matteo Perotti, Luca Valente, Yvan Tortorella, Alessandro Nadalini, Luca Benini, Davide Rossi, Francesco Conti
Darkside: 2.6GFLOPS, 8.7mW Heterogeneous RISC-V Cluster for Extreme-Edge On-Chip DNN Inference and Training. ESSCIRC (2022)
Matteo Perotti, Matheus A. Cavalcante, Nils Wistoff, Renzo Andri, Lukas Cavigelli, Luca Benini
A "New Ara" for Vector Computing: An Open Source Highly Efficient RISC-V V 1.0 Vector Processor Design. CoRR (2022)
Matteo Perotti, Giuseppe Tagliavini, Stefan Mach, Luca Bertaccini, Luca Benini
RVfplib: A Fast and Compact Open-Source Floating-Point Emulation Library for Tiny RISC-V Processors. SAMOS (2021)
Luca Bertaccini, Matteo Perotti, Stefan Mach, Pasquale Davide Schiavone, Florian Zaruba, Luca Benini
Tiny-FPU: Low-Cost Floating-Point Support for Small RISC-V MCU Cores. ISCAS (2021)