Masao Nakaya

Publication Activity (10 Years)

Years Active: 1993-2008
Publications (10 Years): 0

Publications

Masao Nakaya
Special Section on Advanced Technologies in Digital LSIs and Memories. IEICE Trans. Electron. (4) (2008)
Ahmed Amine Jerraya, Olivier Franza, Markus Levy, Masao Nakaya, Pierre G. Paulin, Ulrich Ramacher, Deepu Talla, Wayne H. Wolf
Roundtable: Envisioning the Future for Multiprocessor SoC. IEEE Des. Test Comput. 24 (2) (2007)
James C. Morizio, Michael Hoke, Taskin Koçak, Clark Geddie, Chris Hughes, John Perry, Srinadh Madhavapeddi, Michael H. Hood, George Lynch, Harufusa Kondoh, Toshio Kumamoto, Takashi Okuda, Hiroshi Noda, Masahiko Ishiwaki, Takahiro Miki, Masao Nakaya
14-bit 2.2-MS/s sigma-delta ADC's. IEEE J. Solid State Circuits 35 (7) (2000)
James C. Morizio, Mike Hoke, Taskin Koçak, Clark Geddie, Chris Hughes, John Perry, Srinadh Madhavapeddi, Mike Hood, Ward Huffman, Takashi Okuda, Hiroshi Noda, Yasuo Morimoto, Toshio Kumamoto, Masahiko Ishiwaki, Harufusa Kondoh, Masao Nakaya, Takahiro Miki
SNDR sensitivity analysis for cascaded ΣΔ modulators. ISCAS (2000)
Chikako Nakanishi, Hideki Ando, Tetsuya Hara, Masao Nakaya
Software pipelining with path selection. Systems and Computers in Japan 29 (9) (1998)
Tetsuya Hara, Hideki Ando, Chikako Nakanishi, Masao Nakaya
Performance Comparison of ILP Machines with Cycle Time Evaluation. ISCA (1996)
Hideki Ando, Chikako Nakanishi, Tetsuya Hara, Masao Nakaya
Unconstrained Speculative Execution with Predicated State Buffering. ISCA (1995)
Chikako Nakanishi, Hideki Ando, Hirohisa Machida, Masao Nakaya
Code scheduling on a superscalar processor: SARCH. Systems and Computers in Japan 26 (9) (1995)
Hideki Ando, Chikako Nakanishi, Hirohisa Machida, Tetsuya Hara, Satoru Kishida, Masao Nakaya
Speculative Execution and Reducing Branch Penalty in a Parallel Issue Machine. ICCD (1993)