Marvin Damschen

ORCID

Publication Activity (10 Years)

Years Active: 2014-2019
Publications (10 Years): 12

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

IEEE Embed. Syst. Lett.

ESTIMedia

CoRR

Karlsruhe Institute of Technology, Germany (PHD)

Education History

Karlsruhe Institute of Technology, Germany

PHD

Publications

Lars Bauer, Marvin Damschen, Dirk Ziegenbein, Arne Hamann, Alessandro Biondi, Giorgio C. Buttazzo, Jörg Henkel
Analyses and architectures for mixed-critical systems: industry trends and research perspective. EMSOFT Companion (2019)
Marvin Damschen, Lars Bauer, Jörg Henkel
WCET Guarantees for Opportunistic Runtime Reconfiguration. ICCAD (2019)
Enrico Rossi, Marvin Damschen, Lars Bauer, Giorgio C. Buttazzo, Jörg Henkel
Preemption of the Partial Reconfiguration Process to Enable Real-Time Computing With FPGAs. ACM Trans. Reconfigurable Technol. Syst. 11 (2) (2018)
Marvin Damschen, Frank Mueller, Jörg Henkel
Co-Scheduling on Fused CPU-GPU Architectures With Shared Last Level Caches. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (11) (2018)
Tanja Harbaum, Christoph Schade, Marvin Damschen, Carsten Tradowsky, Lars Bauer, Jörg Henkel, Jürgen Becker
Auto-SI: An adaptive reconfigurable processor with run-time loop detection and acceleration. SoCC (2017)
Marvin Damschen, Lars Bauer, Jörg Henkel
CoRQ: Enabling Runtime Reconfiguration Under WCET Guarantees for Real-Time Systems. IEEE Embed. Syst. Lett. 9 (3) (2017)
Alexander Pöppl, Marvin Damschen, Florian Schmaus, Andreas Fried, Manuel Mohr, Matthias Blankertz, Lars Bauer, Jörg Henkel, Wolfgang Schröder-Preikschat, Michael Bader
Shallow Water Waves on a Deep Technology Stack: Accelerating a Finite Volume Tsunami Model Using Reconfigurable Hardware in Invasive Computing. Euro-Par Workshops (2017)
Marvin Damschen, Lars Bauer, Jörg Henkel
Timing Analysis of Tasks on Runtime Reconfigurable Processors. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Marvin Damschen, Lars Bauer, Jörg Henkel
Extending the WCET Problem to Optimize for Runtime-Reconfigurable Processors. ACM Trans. Archit. Code Optim. 13 (4) (2016)
Stefan Wildermann, Michael Bader, Lars Bauer, Marvin Damschen, Dirk Gabriel, Michael Gerndt, Michael Glaß, Jörg Henkel, Johny Paul, Alexander Pöppl, Sascha Roloff, Tobias Schwarzer, Gregor Snelting, Walter Stechele, Jürgen Teich, Andreas Weichslgartner, Andreas Zwinkau
Invasive computing for timing-predictable stream processing on MPSoCs. it Inf. Technol. 58 (6) (2016)
Lars Bauer, Artjom Grudnitsky, Marvin Damschen, Srinivas Rao Kerekare, Jörg Henkel
Floating point acceleration for stream processing applications in dynamically reconfigurable processors. ESTIMedia (2015)
Marvin Damschen, Heinrich Riebler, Gavin Vaz, Christian Plessl
Transparent offloading of computational hotspots from binary code to Xeon Phi. DATE (2015)
Marvin Damschen, Christian Plessl
Easy-to-Use On-the-Fly Binary Program Acceleration on Many-Cores. CoRR (2014)

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Publication Activity (10 Years)

Top Topics

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Marvin Damschen