Mario Garrido

Publication Activity (10 Years)

Years Active: 2006-2024
Publications (10 Years): 39

Top Topics

Fourier Transform

Frequency Domain

Hardware Architecture

Access Patterns

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

J. Signal Process. Syst.

Publications

Zeynep Kaya, Mario Garrido
Optimized 4-Parallel 1024-Point MSC FFT. IEEE Access 12 (2024)
Zeynep Kaya, Mario Garrido
Novel Access Patterns Based on Overlapping Loading and Processing Times to Reduce Latency and Increase Throughput in Memory-based FFTs. ARITH (2024)
Pedro Paz, Mario Garrido
Efficient Implementation of Complex Multipliers on FPGAs Using DSP Slices. J. Signal Process. Syst. 95 (4) (2023)
Zeynep Kaya, Mario Garrido
Low-Latency 64-Parallel 4096-Point Memory-Based FFT for 6G. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (10) (2023)
Víctor Manuel Bautista, Mario Garrido, Marisa López-Vallejo
Serial Butterflies for Non-Power-of-Two FFT Architectures in 5G and Beyond. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (10) (2023)
Charalampos Eleftheriadis, Mario Garrido, Georgios Karakonstantis
Energy-Efficient Short-Time Fourier Transform for Partial Window Overlapping. ISCAS (2023)
Pedro Paz, Mario Garrido
CORDIC-Based Computation of Arcsine and Arccosine Functions on FPGA. IEEE Trans. Circuits Syst. II Express Briefs 70 (9) (2023)
Pedro Paz, Mario Garrido
A 5.2-GS/s 8-Parallel 1024-Point MDC FFT. DCIS (2023)
Zeynep Kaya, Mario Garrido, Jarmo Takala
Memory-Based FFT Architecture With Optimized Number of Multiplexers and Memory Usage. IEEE Trans. Circuits Syst. II Express Briefs 70 (8) (2023)
Guang-Ting Deng, Mario Garrido, Sau-Gee Chen, Shen-Jui Huang
MSC FFT Architectures. IEEE Access 11 (2023)
Víctor Manuel Bautista, Mario Garrido
An Automatic Generator of Non-Power-of-Two SDF FFT Architectures for 5G and Beyond. DCIS (2023)
Mario Garrido
Simplifying Karnaugh Maps by Making Groups of Non-power-of-two Elements. Circuits Syst. Signal Process. 41 (10) (2022)
Mario Garrido
A Survey on Pipelined FFT Hardware Architectures. J. Signal Process. Syst. 94 (11) (2022)
Mario Garrido, Pedro Malagón
The Constant Multiplier FFT. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (1) (2021)
Mario Garrido, Pedro Paz
Optimum MDC FFT Hardware Architectures in Terms of Delays and Multiplexers. IEEE Trans. Circuits Syst. II Express Briefs 68 (3) (2021)
Narges Mohammadi Sarband, Oscar Gustafsson, Mario Garrido
Using Transposition to Efficiently Solve Constant Matrix-Vector Multiplication and Sum of Product Problems. J. Signal Process. Syst. 92 (10) (2020)
Mario Garrido
Evolution of the Performance of Pipelined FFT Architectures Through the Years. DCIS (2020)
Rikard Andersson, Mario Garrido
Using Rotator Transformations to Simplify FFT Hardware Architectures. IEEE Trans. Circuits Syst. (12) (2020)
Mario Garrido, Peter Pirsch
Continuous-Flow Matrix Transposition Using Memories. IEEE Trans. Circuits Syst. I Regul. Pap. (9) (2020)
Shun-Che Hsu, Shen-Jui Huang, Sau-Gee Chen, Shin-Che Lin, Mario Garrido
A 128-Point Multi-Path SC FFT Architecture. ISCAS (2020)
Mario Garrido, Konrad Möller, Martin Kumm
World's Fastest FFT Architectures: Breaking the Barrier of 100 GS/s. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2019)
Hans Kanders, Tobias Mellqvist, Mario Garrido, Kent Palmkvist, Oscar Gustafsson
A 1 Million-Point FFT on a Single FPGA. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2019)
Mario Garrido
Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal. IEEE Trans. Circuits Syst. II Express Briefs (4) (2019)
Mario Garrido, Jesús Grajal, Oscar Gustafsson
Optimum Circuits for Bit-Dimension Permutations. IEEE Trans. Very Large Scale Integr. Syst. 27 (5) (2019)
Nanda K. Unnikrishnan, Mario Garrido, Keshab K. Parhi
Effect of Finite Word-Length on SQNR, Area and Power for Real-Valued Serial FFT. ISCAS (2019)
Narges Mohammadi Sarband, Oscar Gustafsson, Mario Garrido
Obtaining Minimum Depth Sum of Products from Multiple Constant Multiplication. SiPS (2018)
Cheolyong Bae, Madhur Gokhale, Oscar Gustafsson, Mario Garrido
Improved Implementation Approaches for 512-tap 60 GSa/s Chromatic Dispersion FIR Filters. ACSSC (2018)
Mario Garrido, Shen-Jui Huang, Sau-Gee Chen
Feedforward FFT Hardware Architectures Based on Rotator Allocation. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2018)
Mario Garrido, Marisa Luisa López-Vallejo, Sau-Gee Chen
Guest Editorial: Special Section on Fast Fourier Transform (FFT) Hardware Implementations. J. Signal Process. Syst. 90 (11) (2018)
Konrad Möller, Martin Kumm, Mario Garrido, Peter Zipf
Optimal Shift Reassignment in Reconfigurable Constant Multiplication Circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (3) (2018)
Mario Garrido, Nanda K. Unnikrishnan, Keshab K. Parhi
A Serial Commutator Fast Fourier Architecture for Real-Valued Signals. IEEE Trans. Circuits Syst. II Express Briefs (11) (2018)
Martin Kumm, Oscar Gustafsson, Mario Garrido, Peter Zipf
Optimal Single Constant Multiplication Using Ternary Adders. IEEE Trans. Circuits Syst. II Express Briefs (7) (2018)
Mario Garrido, Miguel Angel Sánchez, María Luisa López Vallejo, Jesús Grajal
A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices. IEEE Trans. Very Large Scale Integr. Syst. 25 (1) (2017)
Anton Kovalev, Oscar Gustafsson, Mario Garrido
Implementation approaches for 512-tap 60 GSa/s chromatic dispersion FIR filters. ACSSC (2017)
Mario Garrido, Petter Kallstrom, Martin Kumm, Oscar Gustafsson
CORDIC II: A New Improved CORDIC Algorithm. IEEE Trans. Circuits Syst. II Express Briefs (2) (2016)
Mario Garrido, Shen-Jui Huang, Sau-Gee Chen, Oscar Gustafsson
The Serial Commutator FFT. IEEE Trans. Circuits Syst. II Express Briefs (10) (2016)
Mario Garrido
A New Representation of FFT Algorithms Using Triangular Matrices. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2016)
Mario Garrido
The Feedforward Short-Time Fourier Transform. IEEE Trans. Circuits Syst. II Express Briefs (9) (2016)
Mario Garrido, Rikard Andersson, Fahad Qureshi, Oscar Gustafsson
Multiplierless Unity-Gain SDF FFTs. IEEE Trans. Very Large Scale Integr. Syst. 24 (9) (2016)
Mario Garrido, Fahad Qureshi, Oscar Gustafsson
Low-Complexity Multiplierless Constant Rotators Based on Combined Coefficient Selection and Shift-and-Add Implementation (CCSSI). IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2014)
Sau-Gee Chen, Shen-Jui Huang, Mario Garrido, Shyh-Jye Jou
Continuous-flow Parallel Bit-Reversal Circuit for MDF and MDC FFT Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2014)
Mario Garrido, Miguel Acevedo, Andreas Ehliar, Oscar Gustafsson
Challenging the limits of FFT performance on FPGAs (Invited paper). ISIC (2014)
Padma Prasad Boopal, Mario Garrido, Oscar Gustafsson
A reconfigurable FFT architecture for variable-length and multi-streaming OFDM standards. ISCAS (2013)
Mario Garrido, Jesús Grajal, Miguel A. Sánchez Marcos, Oscar Gustafsson
Feedforward FFT Architectures. IEEE Trans. Very Large Scale Integr. Syst. 21 (1) (2013)
Petter Kallstrom, Mario Garrido, Oscar Gustafsson
Low-complexity rotators for the FFT using base-3 signed stages. APCCAS (2012)
Tanvir Ahmed, Mario Garrido, Oscar Gustafsson
A 512-point 8-parallel pipelined feedforward FFT for WPAN. ACSCC (2011)
Mario Garrido, Oscar Gustafsson, Jesús Grajal
Accurate Rotations Based on Coefficient Scaling. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Jesús Grajal, Omar A. Yeste Ojeda, Miguel Angel Sánchez, Mario Garrido, Marisa López-Vallejo
Real time FPGA implementation of an automatic modulation classifier for electronic warfare applications. EUSIPCO (2011)
Mario Garrido, Jesús Grajal, Oscar Gustafsson
Optimum Circuits for Bit Reversal. IEEE Trans. Circuits Syst. II Express Briefs (10) (2011)
Fahad Qureshi, Mario Garrido, Oscar Gustafsson
Alternatives for low-complexity complex rotators. ICECS (2010)
Mario Garrido, Keshab K. Parhi, Jesús Grajal
A Pipelined FFT Architecture for Real-Valued Signals. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2009)
Mario Garrido, Jesús Grajal
Efficient Memoryless Cordic for FFT Computation. ICASSP (2) (2007)
Miguel A. Sánchez Marcos, Mario Garrido, Marisa López-Vallejo, Carlos A. López-Barrio
Automated design space exploration of FPGA-based FFT architectures based on area and power estimation. FPT (2006)