Multiplexer and Memory-Efficient Circuits for Parallel Bit Reversal.
Mario GarridoPublished in: IEEE Trans. Circuits Syst. II Express Briefs (2019)
Keyphrases
- memory efficient
- external memory
- random access memory
- high speed
- parallel implementation
- multiple sequence alignment
- multithreading
- shift register
- integral image
- iterative deepening
- bit parallel
- parallel processing
- massively parallel
- distributed memory
- tunnel diode
- computer vision
- logic synthesis
- analog circuits
- data structure