Loganath Ramachandran

Publication Activity (10 Years)

Years Active: 1991-2003
Publications (10 Years): 0

Publications

Ramesh Chandra, Preeti Ranjan Panda, Jörg Henkel, Sri Parameswaran, Loganath Ramachandran
Specification and Design of Multi-Million Gate SOCs. VLSI Design (2003)
Daniel D. Gajski, Sanjiv Narayan, Loganath Ramachandran, Frank Vahid, Peter Fung
System design methodologies: aiming at the 100 h design cycle. IEEE Trans. Very Large Scale Integr. Syst. 4 (1) (1996)
Loganath Ramachandran, Daniel D. Gajski, Sanjiv Narayan, Frank Vahid, Peter Fung
100-hour design cycle: a test case. EURO-DAC (1994)
Daniel D. Gajski, Loganath Ramachandran
Introduction to High-Level Synthesis. IEEE Des. Test Comput. 11 (4) (1994)
Loganath Ramachandran, Daniel Gajski, Viraphol Chaiyakul
An Algorithm for Array Variable Clustering. EDAC-ETC-EUROASIC (1994)
Loganath Ramachandran, Daniel D. Gajski
Architectural tradeoffs in synthesis of pipelined controls. EURO-DAC (1993)
Viraphol Chaiyakul, Daniel Gajski, Loganath Ramachandran
High-Level Transformations for Minimizing Syntactic Variances. DAC (1993)
Loganath Ramachandran, Sanjiv Narayan, Frank Vahid, Daniel D. Gajski
Synthesis of functions and procedures in behavioral VHDL. EURO-DAC (1993)
Loganath Ramachandran, Frank Vahid, Sanjiv Narayan, Daniel D. Gajski
Semantics and synthesis of signals in behavioral VHDL. EURO-DAC (1992)
Loganath Ramachandran, Daniel Gajski
An Algorithm for Component Selection in Performance Optimized Scheduling. ICCAD (1991)