Kwangok Jeong

Publication Activity (10 Years)

Years Active: 2008-2022
Publications (10 Years): 4

Top Topics

Dynamic Random Access Memory

Advanced Technology

Energy Efficient

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Jeongwoo Heo, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyumyung Choi
Hardware Performance Monitoring Methodology at Near-Threshold Computing and Advanced Technology Nodes: From Design to Postsilicon. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (6) (2022)
Jeongwoo Heo, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi
Synthesis of Hardware Performance Monitoring and Prediction Flow Adapting to Near-Threshold Computing and Advanced Process Nodes. ASP-DAC (2020)
Taehwan Kim, Kwangok Jeong, Jungyun Choi, Taewhan Kim, Kyu-Myung Choi
SRAM on-chip monitoring methodology for high yield and energy efficient memory operation at near threshold voltage. Integr. 74 (2020)
Taehwan Kim, Kwangok Jeong, Taewhan Kim, Kyu-Myung Choi
SRAM On-Chip Monitoring Methodology for Energy Efficient Memory Operation at Near Threshold Voltage. ISVLSI (2019)
Kwangok Jeong, Andrew B. Kahng, Seokhyeong Kang, Tajana Simunic Rosing, Richard D. Strong
MAPG: Memory access power gating. DATE (2012)
Sung Kyu Han, Kwangok Jeong, Andrew B. Kahng, Jingwei Lu
Stability and scalability in global routing. SLIP (2011)
Kwangok Jeong, Andrew B. Kahng
Toward PDN resource estimation: A law of general power density. SLIP (2011)
Kwangok Jeong, Andrew B. Kahng, Seokhyeong Kang
Toward effective utilization of timing exceptions in design optimization. ISQED (2010)
Kwangok Jeong, Andrew B. Kahng, Binshan Lin, Kambiz Samadi
Accurate Machine-Learning-Based On-Chip Router Modeling. IEEE Embed. Syst. Lett. 2 (3) (2010)
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu
Assessing chip-level impact of double patterning lithography. ISQED (2010)
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
Timing Yield-Aware Color Reassignment and Detailed Placement Perturbation for Bimodal CD Distribution in Double Patterning Lithography. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (8) (2010)
Kwangok Jeong, Andrew B. Kahng
Methodology from chaos in IC implementation. ISQED (2010)
Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao
Dose Map and Placement Co-Optimization for Improved Timing Yield and Leakage Power. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (7) (2010)
Kwangok Jeong, Andrew B. Kahng, Rasit Onur Topaloglu
Is overlay error more important than interconnect variations in double patterning? SLIP (2009)
Kwangok Jeong, Andrew B. Kahng, Hailong Yao
Revisiting the linear programming framework for leakage power vs. performance optimization. ISQED (2009)
Kwangok Jeong, Andrew B. Kahng
Timing analysis and optimization implications of bimodal CD distribution in double patterning lithography. ASP-DAC (2009)
Mohit Gupta, Kwangok Jeong, Andrew B. Kahng
Timing yield-aware color reassignment and detailed placement perturbation for double patterning lithography. ICCAD (2009)
Kwangok Jeong, Andrew B. Kahng, Kambiz Samadi
Quantified Impacts of Guardband Reduction on Design Process Outcomes. ISQED (2008)
Kwangok Jeong, Andrew B. Kahng, Chul-Hong Park, Hailong Yao
Dose map and placement co-optimization for timing yield enhancement and leakage power reduction. DAC (2008)