Kun-Hsien Lin

Publication Activity (10 Years)

Years Active: 2004-2024
Publications (10 Years): 6

Top Topics

Top Venues

IEEE Open J. Commun. Soc.

Publications

Kun-Hsien Lin, Cheng-An Shen, Su-Chuan Cheng
Applications of AI in Digital Governance Services for Local Taxes- a case of the Local Tax Bureau of Taichung City Government. DG.O (2024)
Kun-Hsien Lin, Kuang-Hao Liu
A Novel Beam Alignment Scheme for Mobile Millimeter-Wave Communications Based on Compressed Sensing Aided-Kalman Filter. IEEE Open J. Commun. Soc. 3 (2022)
Shao-Hua Song, Dong-Chang Lin, Yun-Han Chang, Yun-Shen Lin, Chi-Wai Chow, Yang Liu, Chien-Hung Yeh, Kun-Hsien Lin, Yi-Chang Wang, Yi-Yuan Chen
Using DIALux and Regression-based Machine Learning Algorithm for Designing Indoor Visible Light Positioning (VLP) and Reducing Training Data Collection. OFC (2021)
Li-Sheng Hsu, Dong-Chang Lin, Chi-Wai Chow, Tun-Yao Hung, Yun-Han Chang, Ching-Wei Peng, Yang Liu, Chien-Hung Yeh, Kun-Hsien Lin
Using Machine Learning and Light Spatial Sequence Arrangement for Copying Positioning Unit Cell to Reduce Training Burden in Visible Light Positioning (VLP). WOCC (2021)
Deng-Cheng Tsai, Yun-Shen Lin, Yun-Han Chang, Li-Sheng Hsu, Chi-Wai Chow, Yang Liu, Chien-Hung Yeh, Kun-Hsien Lin
Using Pixel-per-bit Neural Network for Two Rolling Shutter Patterns Decoding in Optical Camera Communication (OCC). WOCC (2021)
Chi-Wai Chow, Chien-Hung Yeh, Yang Liu, Yinchieh Lai, Liang-Yu Wei, Chin-Wei Hsu, Guan-Hong Chen, Xin-Lan Liao, Kun-Hsien Lin
Enabling Techniques for Optical Wireless Communication Systems. OFC (2020)
Ming-Dou Ker, Kun-Hsien Lin
Overview on electrostatic discharge protection designs for mixed-voltage I/O interfaces: design concept and circuit implementations. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2006)
Kun-Hsien Lin, Ming-Dou Ker
Electrostatic discharge protection scheme without leakage current path for CMOS IC operating in power-down-mode condition on a system board. Microelectron. Reliab. 46 (2-4) (2006)
Kun-Hsien Lin, Ming-Dou Ker
ESD protection design for I/O cells in sub-130-nm CMOS technology with embedded SCR structure. ISCAS (2) (2005)
Ming-Dou Ker, Kun-Hsien Lin, Che-Hao Chuang
MOS-Bounded Diodes for On-Chip ESD Protection in Deep Submicron CMOS Process. IEICE Trans. Electron. (3) (2005)
Ming-Dou Ker, Kun-Hsien Lin
ESD protection design for I/O cells with embedded SCR structure as power-rail ESD clamp device in nanoscale CMOS technology. IEEE J. Solid State Circuits 40 (11) (2005)
Ming-Dou Ker, Kun-Hsien Lin
The impact of low-holding-voltage issue in high-voltage CMOS technology and the design of latchup-free power-rail ESD clamp circuit for LCD driver ICs. IEEE J. Solid State Circuits 40 (8) (2005)
Ming-Dou Ker, Kun-Hsien Lin
ESD protection design for IC with power-down-mode operation. ISCAS (2) (2004)
Ming-Dou Ker, Kun-Hsien Lin
Design on ESD protection scheme for IC with power-down-mode operation. IEEE J. Solid State Circuits 39 (8) (2004)