Kenneth D. Wagner

Publication Activity (10 Years)

Years Active: 1985-2005
Publications (10 Years): 0

Publications

Kenneth D. Wagner
Keeping current with silicon and systems technology in the mid-90s. IEEE Des. Test Comput. 22 (1) (2005)
Kenneth D. Wagner
Robust Scan-Based Logic Test in VDSM Technologies. Computer 32 (11) (1999)
Sujit Dey, Anand Raghunathan, Kenneth D. Wagner
Design for Testability Techniques at the Behavioral and Register-Transfer Levels. J. Electron. Test. 13 (2) (1998)
Kenneth D. Wagner, Yervant Zorian
EIC Message. IEEE Des. Test Comput. 13 (2) (1996)
Kenneth D. Wagner, Sujit Dey
High-Level Synthesis for Testability: A Survey and Perspective. DAC (1996)
Kenneth D. Wagner, Bernd Könemann
Testable Programmable Digital Clock Pulse Control Elements. ITC (1993)
Kenneth D. Wagner, Thomas W. Williams
Enhancing Board Functional Self-Test by Concurrent Sampling. ITC (1991)
Kenneth D. Wagner
Guest Editorial: The Many Faces of Test. IEEE Des. Test Comput. 7 (4) (1990)
Kenneth D. Wagner, Thomas W. Williams
Design for Testability of Mixed Signal Integrated Circuits. ITC (1988)
Kenneth D. Wagner
Clock system design. IEEE Des. Test 5 (5) (1988)
Edward J. McCluskey, Samy Makar, Samiha Mourad, Kenneth D. Wagner
Probability models for pseudorandom test sequences. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 7 (1) (1988)
Kenneth D. Wagner, Cary K. Chin, Edward J. McCluskey
Pseudorandom Testing. IEEE Trans. Computers 36 (3) (1987)
Kenneth D. Wagner
The Error Latency of Delay Faults in Combinational and Sequential Circuits. ITC (1985)