Kazuya Katsuki

Publication Activity (10 Years)

Years Active: 2005-2007
Publications (10 Years): 0

Publications

Yuuri Sugihara, Manabu Kotani, Kazuya Katsuki, Kazutoshi Kobayashi, Hidetoshi Onodera
A 90nm 8×16 FPGA Enhancing Speed and Yield Utilizing Within-Die Variations. ASP-DAC (2007)
Kazuya Katsuki, Manabu Kotani, Kazutoshi Kobayashi, Hidetoshi Onodera
A 90 nm LUT Array for Speed and Yield Enhancement by Utilizing Within-Die Delay Variations. IEICE Trans. Electron. (4) (2007)
Kazutoshi Kobayashi, Kazuya Katsuki, Manabu Kotani, Yuuri Sugihara, Yohei Kume, Hidetoshi Onodera
A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations. IEICE Trans. Electron. (10) (2007)
Kazuya Katsuki, Manabu Kotani, Kazutoshi Kobayashi, Hidetoshi Onodera
Measurement results of within-die variations on a 90nm LUT array for speed and yield enhancement of reconfigurable devices. ASP-DAC (2006)
Kazutoshi Kobayashi, Manabu Kotani, Kazuya Katsuki, Y. Takatsukasa, K. Ogata, Yuuri Sugihara, Hidetoshi Onodera
A Yield and Speed Enhancement Technique Using Reconfigurable Devices Against Within-Die Variations on the Nanometer Regime. FPL (2006)
Kazuya Katsuki, Manabu Kotani, Kazutoshi Kobayashi, Hidetoshi Onodera
A yield and speed enhancement scheme under within-die variations on 90nm LUT array. CICC (2005)