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A yield and speed enhancement scheme under within-die variations on 90nm LUT array.

Kazuya KatsukiManabu KotaniKazutoshi KobayashiHidetoshi Onodera
Published in: CICC (2005)
Keyphrases
  • detection scheme
  • real time
  • high speed
  • inverse halftoning
  • wavelet transform
  • programmable logic