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A 90 nm 48 x 48 LUT-Based FPGA Enhancing Speed and Yield Utilizing Within-Die Delay Variations.

Kazutoshi KobayashiKazuya KatsukiManabu KotaniYuuri SugiharaYohei KumeHidetoshi Onodera
Published in: IEICE Trans. Electron. (2007)
Keyphrases
  • high speed
  • real time
  • low cost
  • signal processing
  • hardware implementation
  • power reduction
  • digital images
  • x ray
  • efficient implementation
  • hardware architecture
  • real time image processing