Kanglin Xiao

Publication Activity (10 Years)

Years Active: 2018-2024
Publications (10 Years): 15

Top Topics

Wavelet Analysis

Spiking Neural Networks

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Kanglin Xiao, Xin Qiao, Xiaoxin Cui, Jiahao Song, Haoyang Luo, Xin'an Wang, Yuan Wang
A 28nm 8Kb Reconfigurable SRAM Computing-In-Memory Macro With Input-Sparsity Optimized DTC for Multi-Mode MAC Operations. IEEE Trans. Circuits Syst. II Express Briefs 71 (7) (2024)
Kefei Liu, Jingjie Shang, Xiaoxin Cui, Chenglong Zou, Yisong Kuang, Kanglin Xiao, Yi Zhong, Yuan Wang
How the Brain Achieves Real-Time Vision: A Spiking Position Perception Model. IEEE Trans. Cogn. Dev. Syst. 16 (3) (2024)
Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Jiahao Song, Haoyang Luo, Xin'an Wang, Yuan Wang
A 28nm 32Kb SRAM Computing-in-Memory Macro With Hierarchical Capacity Attenuator and Input Sparsity-Optimized ADC for 4b Mac Operation. IEEE Trans. Circuits Syst. II Express Briefs 70 (6) (2023)
Kefei Liu, Xiaoxin Cui, Xiang Ji, Yisong Kuang, Chenglong Zou, Yi Zhong, Kanglin Xiao, Yuan Wang
Real-Time Target Tracking System With Spiking Neural Networks Implemented on Neuromorphic Chips. IEEE Trans. Circuits Syst. II Express Briefs 70 (4) (2023)
Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Nanbing Pan, Xin'an Wang, Yuan Wang
A Computing-in-Memory SRAM Macro Based on Fully-Capacitive-Coupling With Hierarchical Capacity Attenuator for 4-b MAC Operation. ISCAS (2022)
Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Xin'an Wang, Yuan Wang
A 128 Kb DAC-less 6T SRAM computing-in-memory macro with prioritized subranging ADC for AI edge applications. Microelectron. J. 126 (2022)
Kefei Liu, Xiaoxin Cui, Chenglong Zou, Yisong Kuang, Yi Zhong, Kanglin Xiao, Yuan Wang
A Full-Neuron Memory Model Designed for Neuromorphic Systems. AICAS (2022)
Nanbing Pan, Xiaoxin Cui, Xin Qiao, Kanglin Xiao, Qingyu Guo, Yuan Wang
A 28nm 64Kb SRAM based Inference-Training Tri-Mode Computing-in-Memory Macro. ISCAS (2022)
Kanglin Xiao, Xiaoxin Cui, Xin Qiao, Xin'an Wang, Yuan Wang
A Reconfigurable SRAM Computing-in-Memory Macro Supporting Ping-Pong Operation and CIM pipeline for Multi-mode MAC operations. ICTA (2022)
Kanglin Xiao, Bo Wang, Changpei Qiu, Xin'an Wang
Design and Implementation of a Temperature Self-Compensation Balanced Hybrid Ring Oscillator BHRO. ISCAS (2021)
Kanglin Xiao, Xiaoxin Cui, Kefei Liu, Xiaole Cui, Xin'an Wang
An SNN-Based and Neuromorphic-Hardware-Implementable Noise Filter with Self-adaptive Time Window for Event-Based Vision Sensor. IJCNN (2021)
Yi-Hsiang Chen, Xiaoxin Cui, Kanglin Xiao, Dunshan Yu
Improved Discrete Wavelet Analysis and Principal Component Analysis for EEG Signal Processing. ASICON (2019)
Jiexian Ge, Xiaoxin Cui, Kanglin Xiao, Chenglong Zou, Yi-Hsiang Chen, Rongshan Wei
BNReLU: Combine Batch Normalization and Rectified Linear Unit to Reduce Hardware Overhead. ASICON (2019)
Tingbing Ouyang, Kanglin Xiao, Xiaoqi Lin, Changpei Qiu, Bo Wang
A multi-phase detecting method for spurs cancellation in all digital fractional-N phase-lock loops. MWSCAS (2018)
Kanglin Xiao, Bo Wang, Xiaoqi Lin, Changpei Qiu
A balanced hybrid ring oscillator for precise temperature compensation. MWSCAS (2018)