Kai Zhu

Publication Activity (10 Years)

Years Active: 1992-2007
Publications (10 Years): 0

Publications

Kai Zhu
Post-route LUT output polarity selection for timing optimization. FPGA (2007)
Yao-Wen Chang, Kai Zhu, Guang-Ming Wu, D. F. Wong, C. K. Wong
Analysis of FPGA/FPIC switch modules. ACM Trans. Design Autom. Electr. Syst. 8 (1) (2003)
Yao-Wen Chang, Kai Zhu, D. F. Wong
Timing-driven routing for symmetrical array-based FPGAs. ACM Trans. Design Autom. Electr. Syst. 5 (3) (2000)
Huiqun Liu, Kai Zhu, D. F. Wong
FPGA Partitioning with Complex Resource Constraints. VLSI Design 2000 (3) (2000)
Huiqun Liu, Kai Zhu, D. F. Wong
Circuit Partitioning with Complex Resource Constraints in FPGAs. FPGA (1998)
Kai Zhu, Yao-Wen Chang, D. F. Wong
Timing-driven routing for symmetrical-array-based FPGAs. ICCD (1998)
Kai Zhu, Martin D. F. Wong
Switch bound allocation for maximizing routability in timing-driven routing of FPGA's. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 17 (4) (1998)
Kai Zhu, Martin D. F. Wong
Clock skew minimization during FPGA placement. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (4) (1997)
Kai Zhu, D. F. Wong
Switch Bound Allocation for Maximizing Routability in Timing-Driven Routing of FPGAs. DAC (1994)
Kai Zhu, D. F. Wong
Clock Skew Minimization During FPGA Placement. DAC (1994)
Yao-Wen Chang, Shashidhar Thakur, Kai Zhu, D. F. Wong
A new global routing algorithm for FPGAs. ICCAD (1994)
Kai Zhu, D. F. Wong
Fast Boolean matching for field-programmable gate arrays. EURO-DAC (1993)
Kai Zhu, D. F. Wong, Yao-Wen Chang
Switch module design with application to two-dimensional segmentation design. ICCAD (1993)
Kai Zhu, D. F. Wong
On channel segmentation design for row-based FPGAs. ICCAD (1992)