Switch bound allocation for maximizing routability in timing-driven routing of FPGA's.
Kai ZhuMartin D. F. WongPublished in: IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. (1998)
Keyphrases
- high speed
- upper bound
- switched networks
- real time image processing
- routing algorithm
- real time
- network topology
- division multiple access
- shortest path
- routing protocol
- ad hoc networks
- wireless ad hoc networks
- field programmable gate array
- error bounds
- resource allocation
- hardware architectures
- packet switching
- routing problem
- allocation strategy
- hardware architecture
- hardware implementation
- data driven
- lower bound
- software implementation
- fpga implementation
- optimal allocation
- fpga device