Shashidhar Thakur

Publication Activity (10 Years)

Years Active: 1994-2013
Publications (10 Years): 0

Top Topics

Learning Systems

Query Formulation

Knowledge Extraction

Top Venues

Publications

Shashidhar Thakur
Knowledge in Search. NTCIR (2013)
Jinan Lou, Shashidhar Thakur, Shankar Krishnamoorthy, Henry S. Sheng
Estimating routing congestion using probabilistic analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 21 (1) (2002)
Shashidhar Thakur, Kai-Yuan Chao, D. F. Wong
Minimum Crosstalk Vertical Layer Assignment for Three-Layer VHV Channel Routing. VLSI Design 1998 (1) (1998)
Shashidhar Thakur, Yao-Wen Chang, Martin D. F. Wong, S. Muthukrishnan
Algorithms for an FPGA switch module routing problem with application to global routing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 16 (1) (1997)
Shashidhar Thakur, D. F. Wong
Universal Logic Modules for Series-Parallel Functions. FPGA (1996)
Shashidhar Thakur, D. F. Wong
Series-parallel functions and FPGA logic module design. ACM Trans. Design Autom. Electr. Syst. 1 (1) (1996)
Shashidhar Thakur, D. F. Wong, Shankar Krishnamoorthy
Delay Minimal Decomposition of Multiplexers in Technology Mapping. DAC (1996)
Shashidhar Thakur, D. F. Wong
Simultaneous area and delay minimum K-LUT mapping for K-exact networks. Integr. 20 (3) (1996)
Shashidhar Thakur, Kai-Yuan Chao, D. F. Wong
An Optimal Layer Assignment Algorithm for Minimizing Crosstalk for Three Layer VHV Channel Routing. ISCAS (1995)
Shashidhar Thakur, D. F. Wong
On Designing ULM-based FPGA Logic Modules. FPGA (1995)
Shashidhar Thakur, D. F. Wong
Simultaneous area and delay minimum K-LUT mapping for K-exact networks. ICCD (1995)
Yao-Wen Chang, Shashidhar Thakur, Kai Zhu, D. F. Wong
A new global routing algorithm for FPGAs. ICCAD (1994)
Shashidhar Thakur, D. F. Wong, S. Muthukrishnan
Algorithms for a switch module routing problem. EURO-DAC (1994)