Jeong-Gun Lee

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 26

Top Topics

Semantic Segmentation

Design Space Exploration

Top Venues

IEICE Electron. Express

Concurr. Comput. Pract. Exp.

Publications

Dongyoung Kim, Young Woong Ko, Dong-Kyu Kim, Jeong-Gun Lee
Analysis of Transformer's Attention Behavior in Sleep Stage Classification and Limiting It to Improve Performance. IEEE Access 12 (2024)
Dongyoung Kim, Dong-Kyu Kim, Jeong-Gun Lee
Improved Generalization from Limiting Attention in a Transformer for Sleep Stage Classification. ICEIC (2024)
Jeong-Gun Lee, Dongyoung Kim
Error-Resilient Inference with an Error-Aware Activation Function in a Deep Neural Network. ICEIC (2024)
Taki Hasan Rafi, Ratul Mahjabin, Emon Ghosh, Young Woong Ko, Jeong-Gun Lee
Domain generalization for semantic segmentation: a survey. Artif. Intell. Rev. 57 (9) (2024)
Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Won-Sook Lee, Jeong-Gun Lee, Dong-Kyu Kim
Automatic Sleep Stage Classification Using Deep Learning Algorithm for Multi-Institutional Database. IEEE Access 11 (2023)
Dongyoung Kim, Younghoon Na, Yunhee Woo, Dong-Kyu Kim, Jeong-Gun Lee
Entropy-Based Model Generalization for Sleep Stage Classification. ICTC (2022)
Jaemin Jeong, Ji-Ho Cho, Jeong-Gun Lee
Filter combination learning for CNN model compression. ICT Express 7 (1) (2021)
Dongyoung Kim, Yunhee Woo, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee
Sleep Stage Classification for Inter-institutional Transfer Learning. ICTC (2021)
Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee
Image-based Sleep Stage Classification Model for Multi-Institutional Dataset. ICTC (2021)
Jae Min Jeong, Dongyoung Kim, Yunhee Woo, Jeong-Gun Lee
Filter Combination Learning for Convolutional Neural Network. ICTC (2020)
Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Young Woong Ko, Jeong-Gun Lee
Zero-Keep Filter Pruning for Energy Efficient Deep Neural Network. ICTC (2020)
Nguyen Van Toan, Jeong-Gun Lee
FPGA-Based Multi-Level Approximate Multipliers for High-Performance Error-Resilient Applications. IEEE Access 8 (2020)
Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee
In-Situ Timing Error Predictor-Based Two-Cycle Adaptive Frequency Scaling System on an FPGA. J. Circuits Syst. Comput. 29 (6) (2020)
Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee
A Carry Chain-Based ADMFC Design on an FPGA for EMI Reduction and Noise Compensation. J. Circuits Syst. Comput. 28 (1) (2019)
Nguyen Van Toan, Jeong-Gun Lee
Energy-Area-Efficient Approximate Multipliers for Error-Tolerant Applications on FPGAs. SoCC (2019)
Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee
A high-resolution and glitch-free all-digital variable length ring oscillator design on an FPGA. Comput. Electr. Eng. 74 (2019)
Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee
A GALS design based on multi-frequency clocking for digital switching noise reduction. Integr. 69 (2019)
Ayinebyona Eliab, Yonghwi Kim, Joosang Lee, Jeong-Gun Lee, Jungmin So
G-DCF: Improving System Spectral Efficiency through Concurrent Transmissions in Wireless LANs. Wirel. Commun. Mob. Comput. 2019 (2019)
Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee
Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions. IEEE Trans. Very Large Scale Integr. Syst. 26 (9) (2018)
Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee
A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction. APCCAS (2018)
Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee
Measurements of metastability in MUTEX on an FPGA. IEICE Electron. Express 15 (1) (2018)
Ziho Shin, Myeong-Hoon Oh, Jeong-Gun Lee, Hag-Young Kim, Young Woo Kim
Design of a clockless MSP430 core using mixed asynchronous design flow. IEICE Electron. Express 14 (8) (2017)
Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee
Energy-efficient and high performance 2-phase asynchronous micropipelines. MWSCAS (2017)
Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee
Exploring the current consumption of an Intel Edison module for IoT applications. I2MTC (2017)
Thi Yen Phuong, Deok-Young Lee, Jeong-Gun Lee
A performance, power, and energy analysis of ultrasound B-mode imaging on a GPU with VFS. Concurr. Comput. Pract. Exp. 29 (5) (2017)
Jeong-Gun Lee, Sanghoon Kwak
A performance-aware yield analysis and optimization of manycore architectures. Comput. Electr. Eng. 54 (2016)
Thi Yen Phuong, Jeong-Gun Lee
Design space exploration of SW beamformer on GPU. Concurr. Comput. Pract. Exp. 27 (7) (2015)
Jeong-Gun Lee, Myeong-Hoon Oh
Asynchronous Circuit Designs on an FPGA for Targeting a Power/Energy Efficient SoC. IEICE Trans. Electron. (4) (2014)
Thi Yen Phuong, Jeong-Gun Lee
Software based ultrasound B-mode/beamforming optimization on GPU and its performance prediction. HiPC (2014)
Young Woong Ko, Min-Ja Kim, Jeong-Gun Lee, Chuck Yoo
Deduplication TAR Scheme Using User-Level File System. IEICE Trans. Inf. Syst. (8) (2014)
Jeong-Gun Lee
A Low EMI Circuit Design with Asynchronous Multi-Frequency Clocking. IEICE Trans. Electron. (12) (2014)
Seung-Joon Lee, Deok-Young Lee, Young Woong Ko, Jeong-Gun Lee
Asynchronous Circuit Design on an FPGA: MIPS Processor Case Study. ICHIT (2) (2012)
Byung Ki Kim, Jeong-Gun Lee, Seon Woo Lee, Young Woong Ko
Low Latency Scheduling on Multi BOOST Environment. ICHIT (2) (2012)
Mi Jeong Song, Jeong-Gun Lee, Jong-Myeon Park, Sungjoo Lee
Triggering navigators for innovative system design: The case of lab-on-a-chip technology. Expert Syst. Appl. 39 (16) (2012)
Eun-Gu Jung, Daewan Han, Jeong-Gun Lee
Low area and high speed SHA-1 implementation. ISOCC (2011)
Byung Ki Kim, Jae Hyeok Jang, Kyung Woo Hur, Jeong-Gun Lee, Young Woong Ko
Monitoring and Feedback Tools for Realtime Workloads for Xen Virtual Machine. ICITCS (2011)
Ho Min Jung, Sung Woon Kang, Jin Kim, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko
Energy Efficient File Transfer Mechanism Using Deduplication Scheme. ICHIT (1) (2011)
Ho Min Jung, Won Vien Park, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko
Data Deduplication System for Supporting Multi-mode. ACIIDS (1) (2011)
Jeong-Gun Lee, Kyung Woo Hur, Young Woong Ko
Minimizing Scheduling Delay for Multimedia in Xen Hypervisor. ACN (2011)
Jeong-Gun Lee, Deok-Young Lee, Myeong-Hoon Oh, Young Woong Ko
472MHz throughput asynchronous FIFO design on a Virtex-5 FPGA device. IEICE Electron. Express 8 (9) (2011)
Jeong-Gun Lee, Wook Shin, Suk-Jin Kim, Eun-Gu Jung
A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (6) (2010)
Jeong-Gun Lee, Eun-Gu Jung, Wook Shin
An Asymptotic Performance/Energy Analysis and Optimization of Multi-core Architectures. ICDCN (2009)
Min Zeng, Jeong-Gun Lee, Goang-Seog Choi, Jeong-A Lee
Intelligent sensor node based a low power ECG monitoring system. IEICE Electron. Express 6 (9) (2009)
Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A Lee
Exploration of Power-Delay Trade-Offs with Heterogeneous Adders by Integer Linear Programming. J. Circuits Syst. Comput. 18 (4) (2009)
Jeong-Gun Lee, Eun-Gu Jung
Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip. CDES (2008)
Jeong-Gun Lee, Jeong-A Lee, Byeong-Seok Lee, Milos D. Ercegovac
A Design Method for Heterogeneous Adders. ICESS (2007)
Daniel Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon W. Moore
Implications of Rent's Rule for NoC Design and Its Fault-Tolerance. NOCS (2007)
Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har
Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions. J. VLSI Signal Process. 46 (2-3) (2007)
Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim
Low Latency Four-Flop Synchronizer with the Handshake Interface. IEICE Trans. Inf. Syst. (7) (2005)
Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Kiseon Kim
A Low Latency Asynchronous FIFO Combining a Wave Pipeline with a Handshake Scheme. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (4) (2005)
Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Sun Jhang, Jeong-A Lee, Dong-Soo Har
High performance asynchronous on-chip bus with multiple issue and out-of-order/in-order completion. ACM Great Lakes Symposium on VLSI (2005)
Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee
Instruction level redundant number computations for fast data intensive processing in asynchronous processors. J. Syst. Archit. 51 (3) (2005)
Wook Shin, Jeong-Gun Lee, Hong Kook Kim, Kouichi Sakurai
Procedural Constraints in the Extended RBAC and the Coloured Petri Net Modeling. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2005)
Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har
Differential Value Encoding for Delay Insensitive Handshake Protocol. IEICE Trans. Inf. Syst. (7) (2005)
Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Kiseon Kim
Design of a Mutated Adder and Its Optimization Using ILP Formulation. IEICE Trans. Inf. Syst. (7) (2005)
Eun-Gu Jung, Jeong-Gun Lee, Sanghoon Kwak, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har
Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion. IEICE Trans. Electron. (12) (2005)
Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek
Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization. Asia-Pacific Computer Systems Architecture Conference (2004)
Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya
Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units. DATE (2003)
Euiseok Kim, Dong-Ik Lee, Hiroshi Saito, Hiroshi Nakamura, Jeong-Gun Lee, Takashi Nanya
Performance optimization of synchronous control units for datapaths with variable delay arithmetic units. ASP-DAC (2003)
Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee
Imprecise data computation for high performance asynchronous processors. ASP-DAC (2001)
Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee
Building a Distributed Asynchronous Control Unit through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG. ARVLSI (2001)
Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee
Automatic Process-Oriented Control Circuit Generation for Asynchronous High-Level Synthesis. ASYNC (2000)
Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee
Automatic distributed asynchronous control circuit generation from data flow graph for asynchronous high-level synthesis. ISCAS (2000)