Jeffrey T. Draper

Publication Activity (10 Years)

Years Active: 1991-2017
Publications (10 Years): 7

Top Topics

Conflict Detection

Joint Optimization

Transactional Memory

Top Venues

Publications

Ji Li, Zihao Yuan, Zhe Li, Caiwen Ding, Ao Ren, Qinru Qiu, Jeffrey T. Draper, Yanzhi Wang
Hardware-Driven Nonlinear Activation for Stochastic Computing Based Deep Convolutional Neural Networks. CoRR (2017)
Huimei Cheng, Ji Li, Jeffrey T. Draper, Shahin Nazarian, Yanzhi Wang
Deadline-Aware Joint Optimization of Sleep Transistor and Supply Voltage for FinFET Based Embedded Systems. ACM Great Lakes Symposium on VLSI (2017)
Aditya M. Deshpande, Jeffrey T. Draper
A New Metric to Measure Cache Utilization for HPC Workloads. MEMSYS (2016)
Ji Li, Jeffrey T. Draper
Joint Soft-Error-Rate (SER) Estimation for Combinational Logic and Sequential Elements. ISVLSI (2016)
Lihang Zhao, Lizhong Chen, Woojin Choi, Jeffrey T. Draper
A Filtering Mechanism to Reduce Network Bandwidth Utilization of Transaction Execution. ACM Trans. Archit. Code Optim. 12 (4) (2016)
Aditya M. Deshpande, Jeffrey T. Draper
Modeling Data Movement in the Memory Hierarchy in HPC Systems. MEMSYS (2015)
Aditya M. Deshpande, Jeffrey T. Draper, J. Brian Rigdon, Richard F. Barrett
PathFinder: a signature-search miniapp and its runtime characteristics. IA3@SC (2015)
Lihang Zhao, Jeffrey T. Draper
Consolidated conflict detection for hardware transactional memory. PACT (2014)
Lihang Zhao, Lizhong Chen, Jeffrey T. Draper
Mitigating the Mismatch between the Coherence Protocol and Conflict Detection in Hardware Transactional Memory. IPDPS (2014)
Lihang Zhao, Woojin Choi, Lizhong Chen, Jeffrey T. Draper
In-network traffic regulation for Transactional Memory. HPCA (2013)
Woojin Choi, Jeffrey T. Draper
Improving Utilization of Hardware Signatures in Transactional Memory. IEEE Trans. Parallel Distributed Syst. 24 (11) (2013)
Lihang Zhao, Woojin Choi, Jeffrey T. Draper
TMNOC: a case of HTM and NoC co-design for increased energy efficiency and concurrency. PACT (2012)
Young Hoon Kang, Taek-Jun Kwon, Jeffrey T. Draper
Fault-Tolerant Flow Control in On-chip Networks. NOCS (2010)
Taek-Jun Kwon, Jeffrey T. Draper
Floating-point division and square root using a Taylor-series expansion algorithm. Microelectron. J. 40 (11) (2009)
Young Hoon Kang, Jeff Sondeen, Jeffrey T. Draper
Multicast routing with dynamic packet fragmentation. ACM Great Lakes Symposium on VLSI (2009)
Sumit D. Mediratta, Jeffrey T. Draper
Characterization of a Fault-tolerant NoC Router. ISCAS (2007)
Sumit D. Mediratta, Jeffrey T. Draper
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router. ASAP (2007)
Tim Barrett, Sumit D. Mediratta, Taek-Jun Kwon, Ravinder Singh, Sachit Chandra, Jeff Sondeen, Jeffrey T. Draper
A double-data rate (DDR) processing-in-memory (PIM) device with wideword floating-point capability. ISCAS (2006)
Sumit D. Mediratta, Jeffrey T. Draper
Performance Analysis of User-Level PIM Communication in the Data IntensiVe Architecture (DIVA) System. HiPC (2005)
Sumit D. Mediratta, Craig S. Steele, Jeff Sondeen, Jeffrey T. Draper
An area-efficient and protected network interface for processing-in-memory systems. ISCAS (3) (2005)
Jeffrey T. Draper, Tim Barrett, Jeff Sondeen, Sumit D. Mediratta, Chang Woo Kang, Ihn Kim, Gokhan Daglikoca
A Prototype Processing-In-Memory (PIM) Chip for the Data-Intensive Architecture (DIVA) System. J. VLSI Signal Process. 40 (1) (2005)
Taek-Jun Kwon, Jeff Sondeen, Jeffrey T. Draper
Design trade-offs in floating-point unit implementation for embedded and processing-in-memory systems. ISCAS (4) (2005)
Taek-Jun Kwon, Joong-Seok Moon, Jeff Sondeen, Jeffrey T. Draper
A 0.18 µm implementation of a floating-point unit for a processing-in-memory system. ISCAS (2) (2004)
Sumit D. Mediratta, Jeff Sondeen, Jeffrey T. Draper
An Area-Efficient Router for the Data-Intensive Architecture (DIVA) System. VLSI Design (2004)
Joong-Seok Moon, William C. Athas, Sigfrid D. Soli, Jeffrey T. Draper, Peter A. Beerel
Voltage-pulse driven harmonic resonant rail drivers for low-power applications. IEEE Trans. Very Large Scale Integr. Syst. 11 (5) (2003)
Joong-Seok Moon, William C. Athas, Peter A. Beerel, Jeffrey T. Draper
Low-power sequential access memory design. CICC (2002)
Jeffrey T. Draper, Jacqueline Chame, Mary W. Hall, Craig S. Steele, Tim Barrett, Jeff LaCoss, John J. Granacki, Jaewook Shin, Chun Chen, Chang Woo Kang, Ihn Kim Gokhan
The architecture of the DIVA processing-in-memory chip. ICS (2002)
Jeffrey T. Draper, Jeff Sondeen, Sumit D. Mediratta, Ihn Kim
Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip. ASAP (2002)
Louis Luh, John Choma Jr., Jeffrey T. Draper
Area-Efficient Area Pad Design for High Pin-Count Chips. Great Lakes Symposium on VLSI (1999)
Louis Luh, John Choma Jr., Jeffrey T. Draper
A self-sensing tristate pad driver for control signals of multiple bus controllers. ISCAS (1) (1999)
Jeffrey T. Draper, Jay Block, Jeff Koller, Craig S. Steele
Thermal Management in Embedded Systems Using MEMS. IPPS/SPDP Workshops (1998)
Louis Luh, John Choma Jr., Jeffrey T. Draper
A Continuous-Time Switched-Current Sigma-Delta Modulator with Reduced Loop Delay. Great Lakes Symposium on VLSI (1998)
Craig S. Steele, Jeffrey T. Draper, Jeff Koller
Safety Net: Secure Communications for Embedded High-Performance Computing. IPPS/SPDP Workshops (1998)
Jeffrey T. Draper, Fabrizio Petrini
Routing in Bidirectional k-ary n-cubes with the Red Rover Algorithm. PDPTA (1997)
Craig S. Steele, Jeffrey T. Draper, Jeff Koller, C. LaCour
A Bus-Efficient Low-Latency Network Interface for the PDSS Multicomputer. HPDC (1997)
Jeffrey T. Draper
The Red Rover Algorithm for Deadlock-Free Routing on Bidirectional Rings. PDPTA (1996)
Jeffrey T. Draper, Joydeep Ghosh
A Comprehensive Analytical Model for Wormhole Routng in Multicomputer Systems. J. Parallel Distributed Comput. 23 (2) (1994)
Jeffrey T. Draper, Joydeep Ghosh
The M-Cache: A Message-Handling Mechanism for Multicomputer Systems. Parallel Comput. 20 (9) (1994)
Joydeep Ghosh, Kelvin D. Goveas, Jeffrey T. Draper
Performance Evaluation of a Parallel I/O Subsystem for Hypercube Multicomputers. J. Parallel Distributed Comput. 17 (1-2) (1993)
Jeffrey T. Draper, Joydeep Ghosh
Multipath E-Cube Algorithms (MECA) for Adaptive Wormhole Routing and Broadcasting in itk-ary itn-Cubes. IPPS (1992)
Jeffrey T. Draper, Joydeep Ghosh, William C. Athas
The M-cache: a message-retrieving mechanism for multicomputer systems. SPDP (1991)