Implementation of a 32-bit RISC Processor for the Data-Intensive Architecture Processing-In-Memory Chip.
Jeffrey T. DraperJeff SondeenSumit D. MedirattaIhn KimPublished in: ASAP (2002)
Keyphrases
- instruction set
- data intensive
- memory access
- data access
- memory subsystem
- processing elements
- random access memory
- hardware architecture
- computation intensive
- level parallelism
- instruction set architecture
- memory management
- parallel architecture
- data management
- reconfigurable hardware
- floating point
- hardware implementation
- application specific
- processing units
- operating system
- xilinx virtex
- computer architecture
- web services
- big data
- embedded dram
- memory bandwidth
- parallel computers
- processor core
- single instruction multiple data
- data processing
- analog to digital converter
- embedded systems
- distributed systems
- ibm eservertm
- databases
- high speed
- real time
- low cost
- grid technology
- management system
- multithreading
- database management systems
- database applications
- low power consumption
- data objects
- general purpose processors
- direct memory access
- information processing