Jean-Michel Sallese

Publication Activity (10 Years)

Years Active: 2002-2023
Publications (10 Years): 15

Top Topics

Wastewater Treatment

Comparative Study

Design Considerations

Semiconductor Devices

Top Venues

J. Sens. Actuator Networks

Publications

Diego Barrettino, Christoph Zumbühl, Raphaël Kummer, Markus Thalmann, Carolina Balbi, Giuseppe Vassalli, Rosane Moura Dos Santos, Jean-Michel Sallese
Low-Cost Portable Medical Device for the Detection and Quantification of Exosomes. SENSORS (2023)
Amin Rassekh, Majid Shalchian, Jean-Michel Sallese, Farzan Jazaeri
Tunneling Current Through a Double Quantum Dots System. IEEE Access 10 (2022)
Ashkhen Yesayan, Jean-Michel Sallese
Compact Analytical Model of Nanowire Junctionless ISFET. MIXDES (2021)
Alexi Bonament, Alexis Prel, Jean-Michel Sallese, Morgan Madec, Christophe Lallement
Compact Model for Continuous Microfluidic Mixer. MIXDES (2020)
Farzan Jazaeri, Arnout Beckers, Armin Tajalli, Jean-Michel Sallese
A Review on Quantum Computing: From Qubits to Front-end Electronics and Cryogenic MOSFET Physics. MIXDES (2019)
Wladek Grabinski, Ahmed Abo-Elhadid, Marek Mierzwinski, Laurent Lemaitre, Mike Brinson, Christophe Lallement, Jean-Michel Sallese, Sadayuki Yoshitomi, Paul Malisse, Henri Oguey, Stefan Cserveny, Marcelo Antonio Pavanello, Christian C. Enz, François Krummenacher, Eric A. Vittoz, Michelly de Souza, Daniel Tomaszewski, Jolanta Malesinska, Grzegorz Gluszko, Matthias Bucher, Nikolaos Makris, Aristeidis Nikolaou
FOSS EKV2.6 Verilog-A Compact MOSFET Model. ESSDERC (2019)
Rosane Moura Dos Santos, Jean-Michel Sallese, Marco Mattavelli, Catherine Dehollain, Diego Barrettino
High Precision Capacitive Moisture Sensor for Polymers. IEEE SENSORS (2018)
Nikolaos Makris, Matthias Bucher, Farzan Jazaeri, Jean-Michel Sallese
A Compact Model for Static and Dynamic Operation of Symmetric Double-Gate Junction FETs. ESSDERC (2018)
Salim El Ghouli, Wladyslaw Grabinski, Jean-Michel Sallese, Andre Juge, Christophe Lallement
Analog RF and mm-Wave design Tradeoff in UTBB FDSOI: Application to a 35 GHz LNA. MIXDES (2018)
Chiara Rossi, Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese
Modeling Surface Recombination with Enhanced Devices Network for Optoelectronics. NEWCAS (2018)
Chiara Rossi, Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese
SPICE modeling of light induced current in silicon with 'Generalized' lumped devices. ESSDERC (2017)
Salim El Ghouli, Patrick Scheer, Michel Minondo, Andre Juge, Thierry Poiroux, Jean-Michel Sallese, Christophe Lallement
Analog and RF modeling of FDSOI UTBB MOSFET using Leti-UTSOI model. MIXDES (2016)
Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese, Maher Kayal
Active guard ring characterization for Smart Power ICs. MIXDES (2016)
Pietro Buccella, Camillo Stefanucci, Hao Zou, Yasser Moursy, Ramy Iskander, Jean-Michel Sallese, Maher Kayal
Methodology for 3-D Substrate Network Extraction for SPICE Simulation of Parasitic Currents in Smart Power ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (9) (2016)
Camillo Stefanucci, Pietro Buccella, Ehrenfried Seebacher, Alexander Steinmair, Maher Kayal, Jean-Michel Sallese
Analysis of substrate currents propagation in HVCMOS technology. ESSDERC (2016)
Camillo Stefanucci, Pietro Buccella, Maher Kayal, Jean-Michel Sallese
Modeling avalanche breakdown for ESD diodes in integrated circuits. DTIS (2015)
Wladek Grabinski, Daniel Tomaszewski, Farzan Jazaeri, Anurag Mangla, Jean-Michel Sallese, Maria-Anna Chalkiadaki, Antonios Bazigos, Matthias Bucher
FOSS EKV 2.6 parameter extractor. MIXDES (2015)
Camillo Stefanucci, Pietro Buccella, Maher Kayal, Jean-Michel Sallese
Modeling parasitic vertical PNP in HVCMOS. MIXDES (2015)
Hao Zou, Yasser Moursy, Ramy Iskander, Camillo Stefanucci, Pietro Buccella, Maher Kayal, Jean-Michel Sallese
Substrate noise modeling with dedicated CAD framework for smart power ICs. ISCAS (2015)
Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese, Maher Kayal
Spice simulation of passive protection in smart power ICs. MIXDES (2015)
Camillo Stefanucci, Pietro Buccella, Maher Kayal, Jean-Michel Sallese
Optimization strategy of numerical simulations applied to EPFL substrate model. MIXDES (2014)
Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal
Evaluation of characteristic parameters for high performance hall cells. Microelectron. J. 45 (9) (2014)
Pietro Buccella, Camillo Stefanucci, Jean-Michel Sallese, Maher Kayal
Spice simulation of substrate minority carriers propagation with equivalent electrical circuit. MIXDES (2014)
Lucian Barbut, Farzan Jazaeri, Didier Bouvet, Jean-Michel Sallese
Heavily doped junctionless vertical slit FETs with slit width Below 20 nm. MIXDES (2013)
Christian Kauth, Marc Pastre, Jean-Michel Sallese, Maher Kayal
System-Level Design Considerations for Carbon Nanotube Electromechanical Resonators. J. Sensors 2013 (2013)
Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal
Hall Effect Sensors Design, Integration and Behavior Analysis. J. Sens. Actuator Networks 2 (1) (2013)
Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal
Characteristic parameters evaluation of Hall cells with high performance. MIXDES (2013)
Lucian Barbut, Farzan Jazaeri, Didier Bouvet, Jean-Michel Sallese
Design space of twin gate junctionless vertical slit field effect transistors. MIXDES (2013)
Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal
Comparative Study on the Performance of Five Different Hall Effect Devices. Sensors 13 (2) (2013)
Maria-Alexandra Paun, Jean-Michel Sallese, Maher Kayal
Temperature considerations on Hall Effect sensors current-related sensitivity behaviour. ICECS (2012)
Fabrizio Lo Conte, Jean-Michel Sallese, Maher Kayal
Meshing strategy of equivalent substrate schematic in SMART power IC. ISCAS (2011)
Louis Harik, Jean-Michel Sallese, Maher Kayal
SOI digital pixel sensor based on charge pumping. Microelectron. J. 41 (11) (2010)
Fabien Prégaldiny, Christophe Lallement, B. Diagne, Jean-Michel Sallese, François Krummenacher
Compact Modeling of Emerging Technologies with VHDL-AMS. FDL (2006)
Pierre C. Fazan, Serguei Okhonin, Mikhail Nagoga, Jean-Michel Sallese
A simple 1-transistor capacitor-less memory cell for high performance embedded DRAMs. CICC (2002)