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Jayen Desai
Publication Activity (10 Years)
Years Active: 2006-2016
Publications (10 Years): 1
Top Topics
Transmission Electron Microscopy
Memory Management
High End
Parallel Processors
Top Venues
ISSCC
IEEE J. Solid State Circuits
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Publications
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William J. Bowhill
,
Blaine A. Stackhouse
,
Nevine Nassif
,
Zibing Yang
,
Arvind Raghavan
,
Oscar Mendoza
,
Charles Morganti
,
Chris Houghton
,
Dan Krueger
,
Olivier Franza
,
Jayen Desai
,
Jason Crop
,
Brian Brock
,
Dave Bradley
,
Chris Bostak
,
Sal Bhimji
,
Matt Becker
The Xeon® Processor E5-2600 v3: a 22 nm 18-Core Product Family.
IEEE J. Solid State Circuits
51 (1) (2016)
William J. Bowhill
,
Blaine A. Stackhouse
,
Nevine Nassif
,
Zibing Yang
,
Arvind Raghavan
,
Charles Morganti
,
Chris Houghton
,
Dan Krueger
,
Olivier Franza
,
Jayen Desai
,
Jason Crop
,
Dave Bradley
,
Chris Bostak
,
Sal Bhimji
,
Matt Becker
4.5 The Xeon® processor E5-2600 v3: A 22nm 18-core product family.
ISSCC
(2015)
Blaine A. Stackhouse
,
Sal Bhimji
,
Chris Bostak
,
Dave Bradley
,
Brian S. Cherkauer
,
Jayen Desai
,
Erin Francom
,
Mike Gowan
,
Paul E. Gronowski
,
Dan Krueger
,
Charles Morganti
,
Steve Troyer
A 65 nm 2-Billion Transistor Quad-Core Itanium Processor.
IEEE J. Solid State Circuits
44 (1) (2009)
Tim Fischer
,
Jayen Desai
,
Bruce Andrew Doyle
,
Samuel Naffziger
,
Ben Patella
A 90-nm variable frequency clock system for a power-managed itanium architecture processor.
IEEE J. Solid State Circuits
41 (1) (2006)
Samuel Naffziger
,
Blaine A. Stackhouse
,
Tom Grutkowski
,
Doug Josephson
,
Jayen Desai
,
Elad Alon
,
Mark Horowitz
The implementation of a 2-core, multi-threaded itanium family processor.
IEEE J. Solid State Circuits
41 (1) (2006)