Bruce Andrew Doyle

Publication Activity (10 Years)

Years Active: 2006-2012
Publications (10 Years): 0

Top Topics

Instruction Set

Ibm Power Processor

Top Venues

IEEE J. Solid State Circuits

Publications

Alvin Leng Sun Loke, Bruce Andrew Doyle, Sanjeev K. Maheshwari, Dennis Michael Fischette, Charles Lin Wang, Tin Tin Wee, Emerson S. Fang
An 8.0-Gb/s HyperTransport Transceiver for 32-nm SOI-CMOS Server Processors. IEEE J. Solid State Circuits 47 (11) (2012)
Bruce Andrew Doyle, Alvin Leng Sun Loke, Sanjeev K. Maheshwari, Charles Lin Wang, Dennis Michael Fischette, Jeffrey G. Cooper, Sanjeev K. Aggarwal, Tin Tin Wee, Chad O. Lackey, Harishkumar S. Kedarnath, Michael M. Oshima, Gerry R. Talbot, Emerson S. Fang
Extending HyperTransport™ technology to 8.0 Gb/s in 32-nm SOI-CMOS processors. A-SSCC (2011)
Jingcheng Zhuang, Bruce Andrew Doyle, Emerson S. Fang
Linear Equalization and PVT-Independent DC Wander Compensation for AC-Coupled PCIe 3.0 Receiver Front End. IEEE Trans. Circuits Syst. II Express Briefs (5) (2011)
Dennis Michael Fischette, Alvin Leng Sun Loke, Michael M. Oshima, Bruce Andrew Doyle, Roland Bakalski, Richard Joseph DeSantis, Anand Thiruvengadam, Charles Lin Wang, Gerry R. Talbot, Emerson S. Fang
A 45nm SOI-CMOS dual-PLL processor clock system for multi-protocol I/O. ISSCC (2010)
Alvin Leng Sun Loke, Bruce Andrew Doyle, Michael M. Oshima, Wade L. Williams, Robert G. Lewis, Charles Lin Wang, Audie Hanpachern, Karen M. Tucker, Prashanth Gurunath, Gladney C. Asada, Chad O. Lackey, Tin Tin Wee, Emerson S. Fang
processor links. CICC (2009)
Tim Fischer, Jayen Desai, Bruce Andrew Doyle, Samuel Naffziger, Ben Patella
A 90-nm variable frequency clock system for a power-managed itanium architecture processor. IEEE J. Solid State Circuits 41 (1) (2006)