J. Rubén Titos Gil

Publication Activity (10 Years)

Years Active: 2008-2024
Publications (10 Years): 10

Top Topics

Transactional Memory

Top Venues

IEEE Trans. Parallel Distributed Syst.

Microprocess. Microsystems

J. Parallel Distributed Comput.

Publications

Víctor Nicolás-Conesa, J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
On the interactions between ILP and TLP with hardware transactional memory. Microprocess. Microsystems 104 (2024)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 33 (1) (2022)
Marina Shimchenko, J. Rubén Titos Gil, Ricardo Fernández Pascual, Manuel E. Acacio, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean
Analysing software prefetching opportunities in hardware transactional memory. J. Supercomput. 78 (1) (2022)
Eduardo José Gómez-Hernández, Juan M. Cebrian, J. Rubén Titos Gil, Stefanos Kaxiras, Alberto Ros
Efficient, Distributed, and Non-Speculative Multi-Address Atomic Operations. MICRO (2021)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
PfTouch: Concurrent page-fault handling for Intel restricted transactional memory. J. Parallel Distributed Comput. 145 (2020)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Concurrent Irrevocability in Best-Effort Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 31 (6) (2020)
J. Rubén Titos Gil, Antonio Flores, Ricardo Fernández Pascual, Alberto Ros, Salvador Petit, Julio Sahuquillo, Manuel E. Acacio
Way Combination for an Adaptive and Scalable Coherence Directory. IEEE Trans. Parallel Distributed Syst. 30 (11) (2019)
J. Rubén Titos Gil, Antonio Flores, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Way-combining directory: an adaptive and scalable low-cost coherence directory. ICS (2017)
Oscar Palomar, Santhosh Kumar Rethinagiri, Gulay Yalcin, J. Rubén Titos Gil, Pablo Prieto, Emma Torrella, Osman S. Unsal, Adrián Cristal, Pascal Felber, Anita Sobe, Yaroslav Hayduk, Mascha Kurpicz, Christof Fetzer, Thomas Knauth, Malte Schneegaß, Jens Struckmeier, Dragomir Milojevic
Energy minimization at all layers of the data center: The ParaDIME project. DATE (2016)
J. Rubén Titos Gil, Oscar Palomar, Osman S. Unsal, Adrián Cristal
Architectural support for efficient message passing on shared memory multi-cores. J. Parallel Distributed Comput. 95 (2016)
Jochen Hollmann, J. Rubén Titos Gil, Per Stenström
Enhancing Garbage Collection Synchronization Using Explicit Bit Barriers. ICPP (2015)
J. Rubén Titos Gil, Oscar Palomar, Osman S. Unsal, Adrián Cristal
DiMP: Architectural Support for Direct Message Passing on Shared Memory Multi-cores. ICPP (2015)
Santhosh Kumar Rethinagiri, Oscar Palomar, Anita Sobe, Gulay Yalcin, Thomas Knauth, J. Rubén Titos Gil, Pablo Prieto, Malte Schneegaß, Adrián Cristal, Osman S. Unsal, Pascal Felber, Christof Fetzer, Dragomir Milojevic
ParaDIME: Parallel Distributed Infrastructure for Minimization of Energy for data centers. Microprocess. Microsystems 39 (8) (2015)
Bhavishya Goel, J. Rubén Titos Gil, Anurag Negi, Sally A. McKee, Per Stenström
Performance and Energy Analysis of the Restricted Transactional Memory Implementation on Haswell. IPDPS (2014)
Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Juan Fernández, Manuel E. Acacio
Selective dynamic serialization for reducing energy consumption in hardware transactional memory systems. J. Supercomput. 68 (2) (2014)
J. Rubén Titos Gil, Anurag Negi, Manuel E. Acacio, José M. García, Per Stenström
ZEBRA: Data-Centric Contention Management in Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 25 (5) (2014)
J. Rubén Titos Gil, Manuel E. Acacio, José M. García
Efficient Eager Management of Conflicts for Scalable Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 24 (1) (2013)
Anurag Negi, J. Rubén Titos Gil
SCIN-cache: Fast speculative versioning in multithreaded cores. ACM Trans. Archit. Code Optim. 9 (4) (2013)
Adrià Armejach, J. Rubén Titos Gil, Anurag Negi, Osman S. Unsal, Adrián Cristal
Techniques to improve performance in requester-wins hardware transactional memory. ACM Trans. Archit. Code Optim. 10 (4) (2013)
J. Rubén Titos Gil, Anurag Negi, Manuel E. Acacio, José M. García, Per Stenström
Eager Beats Lazy: Improving Store Management in Eager Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 24 (11) (2013)
Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Juan Fernández, Manuel E. Acacio
On the design of energy-efficient hardware transactional memory systems. Concurr. Comput. Pract. Exp. 25 (6) (2013)
J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Tim Harris, Adrián Cristal, Osman S. Unsal, Ibrahim Hur, Mateo Valero
Hardware transactional memory with software-defined conflicts. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Manuel E. Acacio, Juan Fernández
Dynamic Serialization: Improving Energy Consumption in Eager-Eager Hardware Transactional Memory Systems. PDP (2012)
Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström
π-TM: Pessimistic invalidation for scalable lazy hardware transactional memory. HPCA (2012)
J. Rubén Titos Gil, Anurag Negi, Manuel E. Acacio, José M. García, Per Stenström
ZEBRA: a data-centric, hybrid-policy hardware transactional memory design. ICS (2011)
Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström
The Impact of Non-coherent Buffers on Lazy Hardware Transactional Memory Systems. IPDPS Workshops (2011)
Adrià Armejach, Azam Seyedi, J. Rubén Titos Gil, Ibrahim Hur, Adrián Cristal, Osman S. Unsal, Mateo Valero
Using a Reconfigurable L1 Data Cache for Efficient Version Management in Hardware Transactional Memory. PACT (2011)
Anurag Negi, Per Stenström, J. Rubén Titos Gil, Manuel E. Acacio, José M. García
Pi-TM: Pessimistic Invalidation for Scalable Lazy Hardware Transactional Memory. PACT (2011)
Anurag Negi, J. Rubén Titos Gil, Manuel E. Acacio, José M. García, Per Stenström
Eager Meets Lazy: The Impact of Write-Buffering on Hardware Transactional Memory. ICPP (2011)
Epifanio Gaona-Ramírez, J. Rubén Titos Gil, Juan Fernández, Manuel E. Acacio
Characterizing Energy Consumption in Hardware Transactional Memory Systems. SBAC-PAD (2010)
J. Rubén Titos Gil, Manuel E. Acacio, José Manuel García Carrasco
Speculation-based conflict resolution in hardware transactional memory. IPDPS (2009)
J. Rubén Titos Gil, Manuel E. Acacio, José Manuel García Carrasco
Characterization of Conflicts in Log-Based Transactional Memory (LogTM). PDP (2008)
J. Rubén Titos Gil, Manuel E. Acacio, José M. García
Directory-Based Conflict Detection in Hardware Transactional Memory. HiPC (2008)