Ricardo Fernández Pascual

Publication Activity (10 Years)

Years Active: 2003-2024
Publications (10 Years): 14

Top Topics

Transactional Memory

Top Venues

IEEE Trans. Parallel Distributed Syst.

J. Supercomput.

Concurr. Comput. Pract. Exp.

Publications

Víctor Nicolás-Conesa, J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
On the interactions between ILP and TLP with hardware transactional memory. Microprocess. Microsystems 104 (2024)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
DeTraS: Delaying Stores for Friendly-Fire Mitigation in Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 33 (1) (2022)
Marina Shimchenko, J. Rubén Titos Gil, Ricardo Fernández Pascual, Manuel E. Acacio, Stefanos Kaxiras, Alberto Ros, Alexandra Jimborean
Analysing software prefetching opportunities in hardware transactional memory. J. Supercomput. 78 (1) (2022)
Víctor Nicolás-Conesa, Rubén Titos-Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Analysis of the Interactions Between ILP and TLP With Hardware Transactional Memory. PDP (2022)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
PfTouch: Concurrent page-fault handling for Intel restricted transactional memory. J. Parallel Distributed Comput. 145 (2020)
J. Rubén Titos Gil, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Concurrent Irrevocability in Best-Effort Hardware Transactional Memory. IEEE Trans. Parallel Distributed Syst. 31 (6) (2020)
J. Rubén Titos Gil, Antonio Flores, Ricardo Fernández Pascual, Alberto Ros, Salvador Petit, Julio Sahuquillo, Manuel E. Acacio
Way Combination for an Adaptive and Scalable Coherence Directory. IEEE Trans. Parallel Distributed Syst. 30 (11) (2019)
J. Rubén Titos Gil, Antonio Flores, Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Way-combining directory: an adaptive and scalable low-cost coherence directory. ICS (2017)
Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
To be silent or not: on the impact of evictions of clean data in cache-coherent multicores. J. Supercomput. 73 (10) (2017)
Juan M. Cebrian, Ricardo Fernández Pascual, Alexandra Jimborean, Manuel E. Acacio, Alberto Ros
A dedicated private-shared cache design for scalable multiprocessors. Concurr. Comput. Pract. Exp. 29 (2) (2017)
María Dolores Ruiz-Medina, Elvira Romano, Ricardo Fernández Pascual
Plug-in prediction intervals for a special class of standard ARH(1) processes. J. Multivar. Anal. 146 (2016)
Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Optimization of a Linked Cache Coherence Protocol for Scalable Manycore Coherence. ARCS (2016)
Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Are distributed sharing codes a solution to the scalability problem of coherence directories in manycores? An evaluation study. J. Supercomput. 72 (2) (2016)
María Dolores Ruiz-Medina, José Miguel Angulo, George Christakos, Ricardo Fernández Pascual
New compactly supported spatiotemporal covariance functions from SPDEs. Stat. Methods Appl. 25 (1) (2016)
Antonio García-Guirado, Ricardo Fernández Pascual, José M. García
ICCI: In-Cache Coherence Information. IEEE Trans. Computers 64 (4) (2015)
Juan M. Cebrian, Alberto Ros, Ricardo Fernández Pascual, Manuel E. Acacio
Early Experiences with Separate Caches for Private and Shared Data. e-Science (2015)
Ricardo Fernández Pascual, Alberto Ros, Manuel E. Acacio
Characterization of a List-Based Directory Cache Coherence Protocol for Manycore CMPs. Euro-Par Workshops (2) (2014)
Antonio García-Guirado, Ricardo Fernández Pascual, José M. García, Sandro Bartolini
Managing resources dynamically in hybrid photonic-electronic networks-on-chip. Concurr. Comput. Pract. Exp. 26 (15) (2014)
Alberto Ros, Ricardo Fernández Pascual, Manuel E. Acacio
Using Heterogeneous Networks to Improve Energy Efficiency in Direct Coherence Protocols for Many-Core CMPs. SBAC-PAD (2012)
Manuel E. Acacio, Javier Cuenca, Lorenzo Fernández Maimó, Ricardo Fernández Pascual, Joaquín Cervera, Domingo Giménez, M. Carmen Garrido, Juan A. Sánchez-Laguna, José Guillén, Juan Alejandro Palomino Benito, María-Eugenia Requena
An Experience of Early Initiation to Parallelism in the Computing Engineering Degree at the University of Murcia, Spain. IPDPS Workshops (2012)
Alberto Ros, Blas Cuesta Saez, Ricardo Fernández Pascual, María Engracia Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato
Extending Magny-Cours Cache Coherence. IEEE Trans. Computers 61 (5) (2012)
Francisco Almeida, Javier Cuenca, Ricardo Fernández Pascual, Domingo Giménez, Juan Alejandro Palomino Benito
The Spanish Parallel Programming Contests and its Use as an Educational Resource. IPDPS Workshops (2012)
Antonio García-Guirado, Ricardo Fernández Pascual, Alberto Ros, José M. García
DAPSCO: Distance-aware partially shared cache organization. ACM Trans. Archit. Code Optim. 8 (4) (2012)
Antonio García-Guirado, Ricardo Fernández Pascual, Alberto Ros, José M. García
Energy-Efficient Cache Coherence Protocols in Chip-Multiprocessors for Server Consolidation. ICPP (2011)
Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato
Dealing with Transient Faults in the Interconnection Network of CMPs at the Cache Coherence Level. IEEE Trans. Parallel Distributed Syst. 21 (8) (2010)
Antonio García-Guirado, Ricardo Fernández Pascual, José M. García
Analyzing Cache Coherence Protocols for Server Consolidation. SBAC-PAD (2010)
Alberto Ros, Blas Cuesta, Ricardo Fernández Pascual, María Engracia Gómez, Manuel E. Acacio, Antonio Robles, José M. García, José Duato
: Extending Magny-Cours coherence for large-scale servers. HiPC (2010)
Alberto Ros, Ricardo Fernández Pascual, Manuel E. Acacio, José M. García
Two proposals for the inclusion of directory information in the last-level private caches of glueless shared-memory multiprocessors. J. Parallel Distributed Comput. 68 (11) (2008)
Marco Cornero, Roberto Costa, Ricardo Fernández Pascual, Andrea C. Ornstein, Erven Rohou
An Experimental Environment Validating the Suitability of CLI as an Effective Deployment Format for Embedded Systems. HiPEAC (2008)
Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato
A fault-tolerant directory-based cache coherence protocol for CMP architectures. DSN (2008)
Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato
Extending the TokenCMP Cache Coherence Protocol for Low Overhead Fault Tolerance in CMP Architectures. IEEE Trans. Parallel Distributed Syst. 19 (8) (2008)
Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato
Fault-Tolerant Cache Coherence Protocols for CMPs: Evaluation and Trade-Offs. HiPC (2008)
Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José Duato
A Low Overhead Fault Tolerant Coherence Protocol for CMP Architectures. HPCA (2007)
Gregorio Bernabé, Ricardo Fernández Pascual, José M. García, Manuel E. Acacio, José González
An efficient implementation of a 3D wavelet transform based encoder on hyper-threading technology. Parallel Comput. 33 (1) (2007)
Ricardo Fernández Pascual, José M. García, Gregorio Bernabé, Manuel E. Acacio
Optimizing a 3D-FWT Video Encoder for SMPs and HyperThreading Architectures. PDP (2005)
Ricardo Fernández Pascual, María Dolores Ruiz-Medina, José Miguel Angulo
Multiscale estimation of processes related to the fractional Black-Scholes equation. Comput. Stat. 18 (3) (2003)