J. Gregory Steffan

Publication Activity (10 Years)

Years Active: 1998-2017
Publications (10 Years): 1

Top Topics

Working Environment

Parallel Algorithm

Fpga Implementation

Reconfigurable Hardware

Top Venues

ACM Trans. Reconfigurable Technol. Syst.

Publications

Ilian Tili, Kalin Ovtcharov, J. Gregory Steffan
Reducing the Performance Gap between Soft Scalar CPUs and Custom Hardware with TILT. ACM Trans. Reconfigurable Technol. Syst. 10 (3) (2017)
Stuart Byma, Hadi Bannazadeh, Alberto Leon-Garcia, J. Gregory Steffan, Paul Chow
Virtualized Reconfigurable Hardware Resources in the SAVI Testbed. TRIDENTCOM (2014)
Danyao Wang, Charles Lo, Jasmina Vasiljevic, Natalie D. Enright Jerger, J. Gregory Steffan
DART: A Programmable Architecture for NoC Simulation on FPGAs. IEEE Trans. Computers 63 (3) (2014)
Stuart Byma, J. Gregory Steffan, Hadi Bannazadeh, Alberto Leon-Garcia, Paul Chow
FPGAs in the Cloud: Booting Virtualized Hardware Accelerators with OpenStack. FCCM (2014)
Tao Ai, Mir Adnan Ali, J. Gregory Steffan, Kalin Ovtcharov, Sarmad Zulfiqar, Steve Mann
Producing high-quality real-time HDR video system with FPGA (abstract only). FPGA (2014)
Charles Eric LaForest, Jason Helge Anderson, J. Gregory Steffan
Approaching overhead-free execution on FPGA soft-processors. FPT (2014)
Matthew An, J. Gregory Steffan, Vaughn Betz
Speeding Up FPGA Placement: Parallel Algorithms and Methods. FCCM (2014)
Rafat Rashid, J. Gregory Steffan, Vaughn Betz
Comparing performance, productivity and scalability of the TILT overlay processor to OpenCL HLS. FPT (2014)
Charles Eric LaForest, Zimo Li, Tristan O'rourke, Ming G. Liu, J. Gregory Steffan
Composing Multi-Ported Memories on FPGAs. ACM Trans. Reconfigurable Technol. Syst. 7 (3) (2014)
Charles Eric LaForest, J. Gregory Steffan
Maximizing speed and density of tiled FPGA overlays via partitioning. FPT (2013)
Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan
TILT: A multithreaded VLIW soft processor family. FPL (2013)
Kalin Ovtcharov, Ilian Tili, J. Gregory Steffan
A Multithreaded VLIW Soft Processor Family. FCCM (2013)
Stuart Byma, J. Gregory Steffan, Paul Chow
NetThreads-10G: Software packet processing on NetFPGA-10G in a virtualized networking environment demonstration abstract. FPL (2013)
Ondrej Lhoták, José Nelson Amaral, Kit Barton, Martin Hirzel, J. Gregory Steffan
11th Compiler-Driven Performance Workshop. CASCON (2012)
Chuck (Chengyan) Zhao, J. Gregory Steffan, Cristiana Amza, Allan Kielstra
Compiler Support for Fine-Grain Software-Only Checkpointing. CC (2012)
Charles Eric LaForest, Ming G. Liu, Emma Rae Rapati, J. Gregory Steffan
Multi-ported memories for FPGAs via XOR. FPGA (2012)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Portable, Flexible, and Scalable Soft Vector Processors. IEEE Trans. Very Large Scale Integr. Syst. 20 (8) (2012)
Monia Ghobadi, Geoffrey Salmon, Yashar Ganjali, Martin Labrecque, J. Gregory Steffan
Caliper: Precise and Responsive Traffic Generator. Hot Interconnects (2012)
Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan
Application-specific signatures for transactional memory in soft processors. ACM Trans. Reconfigurable Technol. Syst. 4 (3) (2011)
Diego Huang, J. Gregory Steffan
Programmer-assisted automatic parallelization. CASCON (2011)
Martin Labrecque, J. Gregory Steffan
NetTM: faster and easier synchronization for soft multicores via transactional memory. FPGA (2011)
Mark C. Jeffrey, J. Gregory Steffan
Understanding bloom filter intersection for lazy address-set disambiguation. SPAA (2011)
Jeffrey Kingyens, J. Gregory Steffan
The Potential for a GPU-Like Overlay Architecture for FPGAs. Int. J. Reconfigurable Comput. 2011 (2011)
Danyao Wang, Natalie D. Enright Jerger, J. Gregory Steffan
DART: A programmable architecture for NoC simulation on FPGAs. NOCS (2011)
Jeffrey Kingyens, J. Gregory Steffan
A GPU-inspired soft processor for high-throughput acceleration. IPDPS Workshops (2010)
Clark Verbrugge, J. Gregory Steffan, Mark G. Stoodley, Kit Barton, Ondrej Lhoták
9th Workshop on Compiler-Driven Performance. CASCON (2010)
Martin Labrecque, Mark C. Jeffrey, J. Gregory Steffan
Application-Specific Signatures for Transactional Memory in Soft Processors. ARC (2010)
Martin Labrecque, J. Gregory Steffan
The case for hardware transactional memory in software packet processing. ANCS (2010)
Steven Birk, J. Gregory Steffan, Jason Helge Anderson
Parallelizing FPGA placement using Transactional Memory. FPT (2010)
Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan
Caliper: a tool to generate precise and closed-loop traffic. SIGCOMM (2010)
Charles Eric LaForest, J. Gregory Steffan
Efficient multi-ported memories for FPGAs. FPGA (2010)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Fine-grain performance scaling of soft vector processors. CASES (2009)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Soft vector processors vs FPGA custom hardware: measuring and reducing the gap. FPGA (2009)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Data parallel FPGA workloads: Software versus hardware. FPL (2009)
Martin Labrecque, J. Gregory Steffan
Fast critical sections via thread scheduling for FPGA-based multithreaded processors. FPL (2009)
Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan
Scaling Soft Processor Systems. FCCM (2008)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
VESPA: portable, scalable, and flexible FPGA-based vector processors. CASES (2008)
Mihai Burcea, J. Gregory Steffan, Cristiana Amza
The potential for variable-granularity access tracking for optimistic parallelism. MSPC (2008)
Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
Incrementally parallelizing database transactions with thread-level speculation. ACM Trans. Comput. Syst. 26 (1) (2008)
Antonia Zhai, J. Gregory Steffan, Christopher B. Colohan, Todd C. Mowry
Compiler and hardware support for reducing the synchronization of speculative threads. ACM Trans. Archit. Code Optim. 5 (1) (2008)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Exploration and Customization of FPGA-Based Soft Processors. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (2) (2007)
Martin Labrecque, Peter Yiannacouras, J. Gregory Steffan
Custom code generation for soft processors. SIGARCH Comput. Archit. News 35 (3) (2007)
Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
CMP Support for Large and Dependent Speculative Threads. IEEE Trans. Parallel Distributed Syst. 18 (8) (2007)
Marek Olszewski, Jeremy Cutler, J. Gregory Steffan
JudoSTM: A Dynamic Binary-Rewriting Approach to Software Transactional Memory. PACT (2007)
Martin Labrecque, J. Gregory Steffan
Improving Pipelined Soft Processors with Multithreading. FPL (2007)
Jeff Da Silva, J. Gregory Steffan
A probabilistic pointer analysis for speculative optimizations. ASPLOS (2006)
Stanley L. C. Fung, J. Gregory Steffan
Improving cache locality for thread-level speculation. IPDPS (2006)
Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
Tolerating Dependences Between Large Speculative Threads Via Sub-Threads. ISCA (2006)
Peter Yiannacouras, J. Gregory Steffan, Jonathan Rose
Application-specific customization of soft processor microarchitecture. FPGA (2006)
J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
The STAMPede approach to thread-level speculation. ACM Trans. Comput. Syst. 23 (3) (2005)
Christopher B. Colohan, Anastassia Ailamaki, J. Gregory Steffan, Todd C. Mowry
Optimistic Intra-Transaction Parallelism on Chip Multiprocessors. VLDB (2005)
Peter Yiannacouras, Jonathan Rose, J. Gregory Steffan
The microarchitecture of FPGA-based soft processors. CASES (2005)
Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
Compiler Optimization of Memory-Resident Value Communication Between Speculative Threads. CGO (2004)
J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
Improving Value Communication for Thread-Level Speculation. HPCA (2002)
Antonia Zhai, Christopher B. Colohan, J. Gregory Steffan, Todd C. Mowry
Compiler optimization of scalar value communication between speculative threads. ASPLOS (2002)
J. Gregory Steffan, Christopher B. Colohan, Antonia Zhai, Todd C. Mowry
A scalable approach to thread-level speculation. ISCA (2000)
J. Gregory Steffan, Todd C. Mowry
The Potential for Using Thread-Level Data Speculation to Facilitate Automatic Parallelization. HPCA (1998)