Kaveh Aasaraai

Publication Activity (10 Years)

Years Active: 2006-2023
Publications (10 Years): 4

Top Topics

Hardware Implementation

Top Venues

IACR Cryptol. ePrint Arch.

Publications

Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers
Cyclone-NTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. FPGA (2023)
Kaveh Aasaraai, Don Beaver, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela
FPGA Acceleration of Multi-Scalar Multiplication: CycloneMSM. IACR Cryptol. ePrint Arch. 2022 (2022)
Kaveh Aasaraai, Emanuele Cesena, Rahul Maganti, Nicolas Stalder, Javier Varela, Kevin Bowers
CycloneNTT: An NTT/FFT Architecture Using Quasi-Streaming of Large Datasets on DDR- and HBM-based FPGA Platforms. IACR Cryptol. ePrint Arch. 2022 (2022)
Jürgen Becker, Viktor K. Prasanna, Markus Weimer, Wayne Luk, Kaveh Aasaraai, Derek Chiou
RAW 2018 Invited Talks. IPDPS Workshops (2018)
Kaveh Aasaraai, Andreas Moshovos
What limits the operating frequency of a soft processor design. ReConFig (2014)
Kaveh Aasaraai, Andreas Moshovos
An Architectural Approach to Characterizing and Eliminating Sources of Inefficiency in a Soft Processor Design. FCCM (2014)
Di Wu, Kaveh Aasaraai, Andreas Moshovos
Low-cost, high-performance branch predictors for soft processors. FPL (2013)
Kaveh Aasaraai, Andreas Moshovos
SPREX: A soft processor with Runahead execution. ReConFig (2012)
Maryam Sadooghi-Alvandi, Kaveh Aasaraai, Andreas Moshovos
Toward virtualizing branch direction prediction. DATE (2012)
Kaveh Aasaraai, Andreas Moshovos
NCOR: An FPGA-Friendly Nonblocking Data Cache for Soft Processors with Runahead Execution. Int. J. Reconfigurable Comput. 2012 (2012)
Kaveh Aasaraai, Andreas Moshovos
An Efficient Non-blocking Data Cache for Soft Processors. ReConFig (2010)
Kaveh Aasaraai, Andreas Moshovos
Design space exploration of instruction schedulers for out-of-order soft processors. FPT (2010)
Monia Ghobadi, Martin Labrecque, Geoffrey Salmon, Kaveh Aasaraai, Soheil Hassas Yeganeh, Yashar Ganjali, J. Gregory Steffan
Caliper: a tool to generate precise and closed-loop traffic. SIGCOMM (2010)
Kaveh Aasaraai, Andreas Moshovos
Towards a viable out-of-order soft core: Copy-Free, checkpointed register renaming. FPL (2009)
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
Speculative supplier identification for reducing power of interconnects in snoopy cache coherence protocols. Conf. Computing Frontiers (2007)
Kaveh Aasaraai, Amirali Baniasadi
A Power-Aware Alternative for the Perceptron Branch Predictor. Asia-Pacific Computer Systems Architecture Conference (2007)
Ehsan Atoofian, Amirali Baniasadi, Kaveh Aasaraai
Exploiting Speculation Cost Prediction in Power-Aware Applications. J. Low Power Electron. 3 (1) (2007)
Kaveh Aasaraai, Amirali Baniasadi, Ehsan Atoofian
Computational and storage power optimizations for the O-GEHL branch predictor. Conf. Computing Frontiers (2007)
Kaveh Aasaraai, Amirali Baniasadi
Low-Power Perceptron Branch Predictor. J. Low Power Electron. 2 (3) (2006)