Hiroyuki Akasaka

Publication Activity (10 Years)

Years Active: 2012-2015
Publications (10 Years): 0

Top Topics

Wireless Sensor Networks

High Level Synthesis

Energy Consumption

Routing Protocol

Top Venues

Inf. Media Technol.

IPSJ Trans. Syst. LSI Des. Methodol.

Publications

Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa
Energy-efficient High-level Synthesis for HDR Architecture with Multi-stage Clock Gating. Inf. Media Technol. 10 (1) (2015)
Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa
Energy-efficient High-level Synthesis for HDR Architecture with Multi-stage Clock Gating. IPSJ Trans. Syst. LSI Des. Methodol. 7 (2014)
Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa
Energy-efficient High-level Synthesis for HDR Architectures with Clock Gating Based on Concurrency-oriented Scheduling. IPSJ Trans. Syst. LSI Des. Methodol. 6 (2013)
Hiroyuki Akasaka, Shin-ya Abe, Masao Yanagisawa, Nozomu Togawa
Energy-efficient High-level Synthesis for HDR Architectures with Clock Gating Based on Concurrency-oriented Scheduling. Inf. Media Technol. 8 (4) (2013)
Hiroyuki Akasaka, Masao Yanagisawa, Nozomu Togawa
Energy-efficient high-level synthesis for HDR architectures with clock gating. ISOCC (2012)