Hiroshi Tanimoto

Publication Activity (10 Years)

Years Active: 1990-2023
Publications (10 Years): 15

Top Topics

Underwater Acoustic

Fpga Implementation

Power Reduction

Top Venues

Publications

Haruo Kobayashi, Manato Hirai, Kakeru Otomo, Shogo Katayama, Xueyan Bai, Masashi Chiba, Zifei Xu, Dan Yao, Lengkhang Nengvang, Minh Tri Tran, Kanji Yoshihiro, Anna Kuwana, Takato Ooide, Hiroshi Tanimoto, Yuji Gendai, Jianglin Wei
Back to the Analog Neural Network and Linear Circuit Theory. ASICON (2023)
James H. Crawford, Katherine R. Travis, Laura M. Judd, Barry L. Lefer, Jack E. Dibb, Jhoon Kim, Rokjin Park, Gangwoong Lee, Limseok Chang, James Bernard B. Simpas, Maria Obiminda L. Cambaliza, Ronald C. Macatangay, Vanisa Surapipith, Narisara Thongboonchoo, Nguyen Thi Kim Oanh, To Thi Hien, Bich Thuy Ly, Abdus Salam, Sachin D. Ghude, Mohd Talib Latif, Liya E. Yu, Hiroshi Tanimoto, Yugo Kanaya
The Airborne and Satellite Investigation of Asian Air Quality (Asia-Aq): An Opportunity for International Collaboration. IGARSS (2022)
Manato Hirai, Hiroshi Tanimoto, Yuji Gendai, Shuhei Yamamoto, Anna Kuwana, Haruo Kobayashi
Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter. ISOCC (2020)
Manato Hirai, Shuhei Yamamoto, Hirotaka Arai, Anna Kuwana, Hiroshi Tanimoto, Yuji Gendai, Haruo Kobayashi
Systematic Construction of Resistor Ladder Network for N-ary DACs. ASICON (2019)
Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
Data Selective Rake Reception for Underwater Acoustic Communication in Strong Multipath Interference. J. Electr. Comput. Eng. 2017 (2017)
Tatsuya Abe, Hiroshi Tanimoto, Shingo Yoshizawa
A simple current reference with low sensitivity to supply voltage and temperature. MIXDES (2017)
Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
Comparator design for linearized statistical flash A-to-D converter. MIXDES (2017)
Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
SC-FDE vs OFDM: Performance comparison in shallow-sea underwater acoustic communication. ISPACS (2016)
Shingo Yoshizawa, Daichi Sasaki, Hiroshi Tanimoto
Power Reduction of Variable Wordlength OFDM Receiver in Time-Varying Fading Channels by Monitoring Subcarrier SNRs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (1) (2016)
Akane Tajima, Shingo Yoshizawa, Hiroshi Tanimoto
Performance evaluation of antenna diversity with iterative decoding in OFDM-IDMA systems. DSP (2015)
Hisato Takehata, Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
FPGA implementation of stochastic flash A-to-D converter and its evaluation. ISCIT (2015)
Shingo Yoshizawa, Mai Nozaki, Hiroshi Tanimoto
VLSI Implementation of an Interference Canceller Using Dual-Frame Processing for OFDM-IDMA Systems. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (3) (2015)
Toshiki Sugimoto, Hiroshi Tanimoto, Shingo Yoshizawa
A stochastic flash A-to-D converter with dynamic element matching technique. ISCIT (2015)
Shun Akada, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
Experimental evaluation of data selective rake reception for underwater acoustic communication. ISPACS (2015)
Shingo Yoshizawa, Hiroshi Tanimoto
A low power OFDM receiver monitoring subcarrier SNRs in time-varying fading channels. ISCIT (2015)
Ryuta Ishimoto, Shingo Yoshizawa, Hiroshi Tanimoto, Takashi Saito
Evaluation of diversity combining methods for underwater acoustic OFDM communication. ISPACS (2014)
Mai Nozaki, Shingo Yoshizawa, Hiroshi Tanimoto
VLSI design of an interference canceller for QPSK OFDM-IDMA systems. APCCAS (2014)
Hiroshi Tanimoto
Exact Design of RC Polyphase Filters and Related Issues. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2013)
Takafumi Yamaji, Hiroshi Tanimoto, Junya Matsuno, Tetsuro Itakura
Harmonic Signal Rejection Schemes of Polyphase Downconverters. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2011)
Tetsuo Nishi, Hiroshi Tanimoto, Shin'ichi Oishi
Cascade synthesis of RC polyphase one-ports. ECCTD (2011)
Atsushi Tanaka, Hiroshi Tanimoto
Design of 1 V Operating Fully Differential OTA Using NMOS Inverters in 0.18 µm CMOS Technology. IEICE Trans. Electron. (6) (2009)
Kazuki Yazawa, Hiroshi Tanimoto
Design and Implementation of 0.8-V Active RC Polyphase Filter using 0.18-µm CMOS Inverters with Resistive Level Shifter. ISCAS (2009)
Keishi Komoriyama, Makoto Yashiki, Eiichi Yoshida, Hiroshi Tanimoto
A Very Wideband Active RC Polyphase Filter with Minimum Element Value Spread Using Fully Balanced OTA Based on CMOS Inverters. IEICE Trans. Electron. (6) (2008)
Hiroaki Tanabe, Hiroshi Tanimoto
Transfer Function Preserving Transformations on Equal-Ripple RC Polyphase Filters for Reducing Design Efforts. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2007)
Hiroaki Tanabe, Hiroshi Tanimoto
Design Considerations for RC Polyphase Filters with Simultaneously Equal Ripple Both in Stopband and Passband. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (2) (2006)
Hiroshi Tanimoto, Ryuta Ito, Takafumi Yamaji
Nonlinear Analysis of Bipolar Harmonic Mixer for Direct Conversion Receivers. IEICE Trans. Electron. (6) (2005)
Shoji Otaka, Gaku Takemura, Hiroshi Tanimoto
A low-power low-noise accurate linear-in-dB variable-gain amplifier with 500-MHz bandwidth. IEEE J. Solid State Circuits 35 (12) (2000)
Tetsuro Itakura, Takashi Ueno, Hiroshi Tanimoto, Akira Yasuda, Ryuichi Fujimoto, Tadashi Arai, Hideyuki Kokatsu
A 2.7-V, 200-kHz, 49-dBm, stopband-IIP3, low-noise, fully balanced gm-C filter IC. IEEE J. Solid State Circuits 34 (8) (1999)
Tetsuro Itakura, Takashi Ueno, Hiroshi Tanimoto, Tadashi Arai
A 2 V/sub pp/ linear input-range fully balanced CMOS transconductor and its application to a 2.5 V 2.5 MHz Gm-C LPF. CICC (1999)
Takafumi Yamaji, Hiroshi Tanimoto, Hideyuki Kokatsu
An I/Q active balanced harmonic mixer with IM2 cancelers and a 45° phase shifter. IEEE J. Solid State Circuits 33 (12) (1998)
Akira Yasuda, Hiroshi Tanimoto, Tetsuya Iida
A third-order ΔΣ modulator using second-order noise-shaping dynamic element matching. IEEE J. Solid State Circuits 33 (12) (1998)
Makiko Okumura, Hiroshi Tanimoto
A time-domain method for numerical noise analysis of oscillators. ASP-DAC (1997)
Shoji Otaka, Hiroshi Tanimoto, Shuji Watanabe, Tadahiko Maeda
A 1.9-GHz Si-bipolar variable attenuator for PHS transmitter. IEEE J. Solid State Circuits 32 (9) (1997)
Hiroshi Tanimoto, Tetsuro Itakura, Takashi Ueno, Akira Yasuda, Kazuhiro Oda
An offset-free LPF for π/4-shift QPSK signal generator. IEEE J. Solid State Circuits 31 (12) (1996)
Shoji Otaka, Takafumi Yamaji, Ryuichi Fujimoto, Chikau Takahashi, Hiroshi Tanimoto
A low local input 1.9 GHz Si-bipolar quadrature modulator with no adjustment. IEEE J. Solid State Circuits 31 (1) (1996)
Makiko Okumura, Tsutomu Sugawara, Hiroshi Tanimoto
An efficient small signal frequency analysis method of nonlinear circuits with two frequency excitations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 9 (3) (1990)