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Yuji Gendai
ORCID
Publication Activity (10 Years)
Years Active: 1996-2024
Publications (10 Years): 5
Top Topics
Neural Network
Digital Circuits
Dacs Scheme
Hidden Layer
Top Venues
ASICON
CICC
VTS
ISOCC
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Publications
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Shunichi Kubo
,
Yuji Gendai
,
Satoshi Miura
,
Shinsuke Hara
,
Satoru Tanoi
,
Akifumi Kasarnatsu
,
Takeshi Yoshida
,
Satoshi Tanaka
,
Shuhei Arnakawa
,
Minoru Fujishlrna
A 20Gb/s QPSK Receiver with Mixed-Signal Carrier, Timing, and Data Recovery Using 3-bit ADCs.
CICC
(2024)
Haruo Kobayashi
,
Manato Hirai
,
Kakeru Otomo
,
Shogo Katayama
,
Xueyan Bai
,
Masashi Chiba
,
Zifei Xu
,
Dan Yao
,
Lengkhang Nengvang
,
Minh Tri Tran
,
Kanji Yoshihiro
,
Anna Kuwana
,
Takato Ooide
,
Hiroshi Tanimoto
,
Yuji Gendai
,
Jianglin Wei
Back to the Analog Neural Network and Linear Circuit Theory.
ASICON
(2023)
Manato Hirai
,
Hiroshi Tanimoto
,
Yuji Gendai
,
Shuhei Yamamoto
,
Anna Kuwana
,
Haruo Kobayashi
Nonlinearity Analysis of Resistive Ladder-Based Current-Steering Digital-to-Analog Converter.
ISOCC
(2020)
Yusuke Asada
,
Takahiko Shimizu
,
Yuji Gendai
,
Keno Sato
,
Takashi Ishida
,
Toshiyuki Okamoto
,
Tamotsu Ichikawa
,
Jiang-Lin Wei
,
Nene Kushita
,
Hirotaka Arai
,
Anna Kuwana
,
Takayuki Nakatani
,
Kazumi Hatayama
,
Haruo Kobayashi
Innovative Test Practices in Japan.
VTS
(2019)
Manato Hirai
,
Shuhei Yamamoto
,
Hirotaka Arai
,
Anna Kuwana
,
Hiroshi Tanimoto
,
Yuji Gendai
,
Haruo Kobayashi
Systematic Construction of Resistor Ladder Network for N-ary DACs.
ASICON
(2019)
Yuji Gendai
,
Akira Matsuzawa
A Specific Distortion Pattern of Flash ADCs Identified by Discriminating Time-Domain Analysis.
IEEE Trans. Instrum. Meas.
61 (2) (2012)
Takayuki Toyama
,
Koji Mishina
,
Koji Tsuchiya
,
Tatsuya Ichikawa
,
Hiroyuki Iwaki
,
Yuji Gendai
,
Hirotaka Murakami
,
Kenichi Takamiya
,
Hiroshi Shiroshita
,
Yoshinori Muramatsu
,
Toshihiro Furusawa
A 17.7Mpixel 120fps CMOS image sensor with 34.8Gb/s readout.
ISSCC
(2011)
Yuji Gendai
The Maximum-Likelihood Noise Magnitude Estimation in ADC Linearity Measurements.
IEEE Trans. Instrum. Meas.
59 (7) (2010)
T. Murayama
,
Yuji Gendai
A top down mixed-signal design methodology using a mixed-signal simulator and analog HDL.
EURO-DAC
(1996)