H. Udayakumar

Publication Activity (10 Years)

Years Active: 1999-2009
Publications (10 Years): 0

Publications

Ramamurthy Vishweshwara, Ramakrishnan Venkatraman, H. Udayakumar, N. V. Arvind
An Approach to Measure the Performance Impact of Dynamic Voltage Fluctuations Using Static Timing Analysis. VLSI Design (2009)
Parimala Viswanath, Pranav Murthy, Debajit Das, R. Venkatraman, Ajoy Mandal, Arvind Veeravalli, H. Udayakumar
Optimization strategies to improve statistical timing. ISQED (2009)
Jithendra Srinivas, Madhusudan Rao, Sukumar Jairam, H. Udayakumar, Jagdish C. Rao
Clock gating effectiveness metrics: Applications to power optimization. ISQED (2009)
Ajit Gupte, Mohit Sharma, Gaurav Varshney, Lakshmikantha Holla, Parvinder Rana, H. Udayakumar
Memory Power Modeling - A Novel Approach. ISVLSI (2008)
Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
Clock gating for power optimization in ASIC design cycle theory & practice. ISLPED (2008)
Sukumar Jairam, S. M. Stalin, Jean-Yves Oberle, H. Udayakumar
An SSO Based Methodology for EM Emission Estimation from SoCs. ISQED (2008)
Snehashis Roy, Sukumar Jairam, H. Udayakumar
A Methodology for Switching Activity Based IO Powerpad Optimisation. VLSI Design (2006)
Sankar P. Debnath, Sukumar Jairam, H. Udayakumar
A Methodology for Fast Vector Based Power Supply and Substrate Noise Analyses. VLSI Design (2005)
P. R. Suresh, P. K. Sundararajan, Anshuli Goel, H. Udayakumar, C. Srinivasan, Vasudev Sinari, Raghavendrakumar Ravinutala
Package-silicon co-design - Experiment with an SOC design. VLSI Design (2004)
Karanth Shankaranarayana, Soujanna Sarkar, R. Venkatraman, Shyam S. Jagini, N. Venkatesh, Jagdish C. Rao, H. Udayakumar, M. Sambandam, K. P. Sheshadri, S. Talapatra, Parag Mhatre, Jais Abraham, Rubin A. Parekhji
Challenges in the Design of a Scalable Data-Acquisition and Processing System-on-Silicon. VLSI Design (2002)
Karthikeyan Madathil, Jagdish C. Rao, Subash Chandar G., Amitabh Menon, Avinash K. Gautam, Amit M. Brahme, H. Udayakumar
A Framework for Cost vs. Performance Tradeoffs in the Design of Digital Signal Processor Cores. VLSI Design (2000)
Avinash K. Gautam, Jagdish C. Rao, Karthikeyan Madathil, Vilesh Shah, H. Udayakumar, Amitabh Menon, Subash Chandar G.
A Design Methodology for a Fully Synthesized High Speed DSP Core in a Deep Sub-Micron Technology. ICCD (1999)
Avinash K. Gautam, Jagdish C. Rao, Rohit Rathi, H. Udayakumar
A Design-in Methodology to Ensure First Time Success of Complex Digital Signal Processors. VLSI Design (1999)