Parimala Vishwanath

Publication Activity (10 Years)

Years Active: 2008-2008
Publications (10 Years): 0

Publications

Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
Clock gating for power optimization in ASIC design cycle theory & practice. ISLPED (2008)