Sukumar Jairam

Publication Activity (10 Years)

Years Active: 2004-2010
Publications (10 Years): 0

Publications

Jithendra Srinivas, Sukumar Jairam
Clock gating approaches by IOEX graphs and cluster efficiency plots. DATE (2010)
Jithendra Srinivas, Madhusudan Rao, Sukumar Jairam, H. Udayakumar, Jagdish C. Rao
Clock gating effectiveness metrics: Applications to power optimization. ISQED (2009)
Sukumar Jairam, Madhusudan Rao, Jithendra Srinivas, Parimala Vishwanath, H. Udayakumar, Jagdish C. Rao
Clock gating for power optimization in ASIC design cycle theory & practice. ISLPED (2008)
Sukumar Jairam, S. M. Stalin, Jean-Yves Oberle, H. Udayakumar
An SSO Based Methodology for EM Emission Estimation from SoCs. ISQED (2008)
Sukumar Jairam, Navakanta Bhat
GyroCompiler: A Soft IP Model Synthesis and Analysis Framework for Design of MEMS Based Gyroscopes. VLSI Design (2008)
Sukumar Jairam, Kusum Lata, Subir K. Roy, Navakanta Bhat
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches. ICECS (2008)
Santhosh Coimbatore Vaidyanathan, Amit Mangesh Brahme, Sukumar Jairam
Techniques for Early Package Closure in System-in-Packages. ISQED (2008)
Sankar P. Debnath, Ganesh P. Kumar, Sukumar Jairam
Calibration Based Methods for Substrate Modeling and Noise Analysis for Mixed-Signal SoCsc. VLSI Design (2007)
Snehashis Roy, Sukumar Jairam, H. Udayakumar
A Methodology for Switching Activity Based IO Powerpad Optimisation. VLSI Design (2006)
Sankar P. Debnath, Sukumar Jairam, H. Udayakumar
A Methodology for Fast Vector Based Power Supply and Substrate Noise Analyses. VLSI Design (2005)
Sukumar Jairam, C. Venkatesh, Navakanta Bhat, Shyam Singh, Rudra Pratap
A Quasi Static Model for a Simply Supported Beam in a Circuit Simulation Framework. VLSI Design (2004)