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Subir K. Roy
ORCID
Publication Activity (10 Years)
Years Active: 1999-2016
Publications (10 Years): 2
Top Topics
Formal Verification
Model Checker
Short Circuit
Mixed Signal
Top Venues
VDAT
J. Electron. Test.
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Publications
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Ambuj Mishra
,
Subir K. Roy
Formal verification of switched capacitor DC to DC power converter using circuit simulation traces.
VDAT
(2016)
Pavan Kumar Nadimpalli
,
Subir K. Roy
An efficient FPGA-based function profiler for embedded system applications.
VDAT
(2016)
Kusum Lata
,
Subir K. Roy
Formal Verification of Analog and Mixed Signal Designs Using SPICE Circuit Simulation Traces.
J. Electron. Test.
29 (5) (2013)
Lopamudra Sen
,
Amit Roy
,
Supriya Bhattacharjee
,
Bijitendra Mittra
,
Subir K. Roy
DFT logic verification through property based formal methods - SOC to IP.
FMCAD
(2010)
Sukumar Jairam
,
Kusum Lata
,
Subir K. Roy
,
Navakanta Bhat
Verification of a MEMS based adaptive cruise control system using simulation and semi-formal approaches.
ICECS
(2008)
Subir K. Roy
,
Rubin A. Parekhji
Modeling Techniques for Formal Verification of BIST Controllers and Their Integration into SOC Designs.
VLSI Design
(2007)
Subir K. Roy
Top Level SOC Interconnectivity Verification Using Formal Techniques.
MTV
(2007)
Subir K. Roy
,
S. Ramesh
,
Supratik Chakraborty
,
Tsuneo Nakata
,
Sreeranga P. Rajan
Functional Verification of System on Chips-Practices, Issues and Challenges (Tutorial Abstract).
VLSI Design
(2002)
Subir K. Roy
,
Hiroaki Iwashita
,
Tsuneo Nakata
Formal verification based on assume and guarantee approach - a case study (short paper).
ASP-DAC
(2000)
Subir K. Roy
,
Hiroaki Iwashita
,
Tsuneo Nakata
Dataflow Analysis for Resource Contention and Register Leakage Properties.
VLSI Design
(2000)
Pradip K. Kar
,
Subir K. Roy
TECHMIG: A Layout Tool for Technology Migration.
VLSI Design
(1999)
Bupesh Pandita
,
Subir K. Roy
Design and Implementation of Viterbi Decoder Using FPGAs.
VLSI Design
(1999)