Geordie Braceras

Publication Activity (10 Years)

Years Active: 2007-2012
Publications (10 Years): 0

Top Topics

Cmos Technology

Top Venues

IEEE J. Solid State Circuits

Publications

Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John Gabric, Robert M. Houle, Steve Lamphier, Carl Radens, Adnan Seferagic
A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements. IEEE J. Solid State Circuits 47 (1) (2012)
Harold Pilo, Igor Arsovski, Kevin Batson, Geordie Braceras, John Gabric, Robert M. Houle, Steve Lamphier, Frank Pavlik, Adnan Seferagic, Liang-Yu Chen, Shang-Bin Ko, Carl Radens
A 64Mb SRAM in 32nm High-k metal-gate SOI technology with 0.7V operation enabled by stability, write-ability and read-ability enhancements. ISSCC (2011)
Vinod Ramadurai, Harold Pilo, John Andersen, Geordie Braceras, John Gabric, Daniel Geise, Steve Lamphier, Yue Tan
An 8 Mb SRAM in 45 nm SOI Featuring a Two-Stage Sensing Scheme and Dynamic Power Management. IEEE J. Solid State Circuits 44 (1) (2009)
Harold Pilo, Vaidyanathan Ramadurai, Geordie Braceras, John Gabric, Steve Lamphier, Yue Tan
A 450ps Access-Time SRAM Macro in 45nm SOI Featuring a Two-Stage Sensing-Scheme and Dynamic Power Management. ISSCC (2008)
Harold Pilo, Charlie Barwin, Geordie Braceras, Chris Browning, Steve Lamphier, Fred Towler
An SRAM Design in 65-nm Technology Node Featuring Read and Write-Assist Circuits to Expand Operating Voltage. IEEE J. Solid State Circuits 42 (4) (2007)