A 64 Mb SRAM in 32 nm High-k Metal-Gate SOI Technology With 0.7 V Operation Enabled by Stability, Write-Ability and Read-Ability Enhancements.
Harold PiloIgor ArsovskiKevin BatsonGeordie BracerasJohn GabricRobert M. HouleSteve LamphierCarl RadensAdnan SeferagicPublished in: IEEE J. Solid State Circuits (2012)